[llvm] [missed-opt][isel] Unnecessary shift count masking in 128 bit arithmetic (PR #172506)
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Tue Dec 16 07:59:34 PST 2025
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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
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You can test this locally with the following command:
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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp --diff_from_common_commit
``````````
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 92d5393e1..d74726d38 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -10544,7 +10544,7 @@ SDValue DAGCombiner::visitSHL(SDNode *N) {
// fold (shl x, (and y, 63)) -> (shl x, y)
// if VT is i64 then mask must be 63
- // if VT is i32 then mask must be 31
+ // if VT is i32 then mask must be 31
if (N1.getOpcode() == ISD::AND) {
SDValue AndLHS = N1.getOperand(0);
SDValue AndRHS = N1.getOperand(1);
``````````
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https://github.com/llvm/llvm-project/pull/172506
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