[llvm] [CodeGen][NPM] Add support for -print-regusage in New Pass Manager (PR #169761)
Teja Alaghari via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 16 07:57:50 PST 2025
https://github.com/TejaX-Alaghari updated https://github.com/llvm/llvm-project/pull/169761
>From 3e562d352bf7686255586f454ce87975d765d511 Mon Sep 17 00:00:00 2001
From: vikhegde <vikram.hegde at amd.com>
Date: Mon, 8 Sep 2025 11:37:49 +0530
Subject: [PATCH 1/4] Fixes to be upstreamed - 10
1. add support for DumpRegUsage in NPM (currntly I have added it in the destructor of RegisterUsageInfo, this seems to work but im not sure if it has any side effects)
---
llvm/include/llvm/CodeGen/RegisterUsageInfo.h | 2 ++
llvm/lib/CodeGen/RegisterUsageInfo.cpp | 7 +++++++
2 files changed, 9 insertions(+)
diff --git a/llvm/include/llvm/CodeGen/RegisterUsageInfo.h b/llvm/include/llvm/CodeGen/RegisterUsageInfo.h
index 9b0d30426f1d3..ada87e5632b4c 100644
--- a/llvm/include/llvm/CodeGen/RegisterUsageInfo.h
+++ b/llvm/include/llvm/CodeGen/RegisterUsageInfo.h
@@ -34,6 +34,8 @@ class TargetMachine;
class PhysicalRegisterUsageInfo {
public:
+
+ ~PhysicalRegisterUsageInfo();
/// Set TargetMachine which is used to print analysis.
void setTargetMachine(const TargetMachine &TM);
diff --git a/llvm/lib/CodeGen/RegisterUsageInfo.cpp b/llvm/lib/CodeGen/RegisterUsageInfo.cpp
index 2ef380fc7cad4..d48280642da52 100644
--- a/llvm/lib/CodeGen/RegisterUsageInfo.cpp
+++ b/llvm/lib/CodeGen/RegisterUsageInfo.cpp
@@ -56,6 +56,13 @@ bool PhysicalRegisterUsageInfo::doFinalization(Module &M) {
return false;
}
+PhysicalRegisterUsageInfo::~PhysicalRegisterUsageInfo() {
+ if (DumpRegUsage)
+ print(errs());
+
+ RegMasks.shrink_and_clear();
+}
+
void PhysicalRegisterUsageInfo::storeUpdateRegUsageInfo(
const Function &FP, ArrayRef<uint32_t> RegMask) {
RegMasks[&FP] = RegMask;
>From 08f2e6c19df6616c90a42eb242d0a64abf470a20 Mon Sep 17 00:00:00 2001
From: Teja Alaghari <teja.alaghari at amd.com>
Date: Thu, 27 Nov 2025 10:42:36 +0530
Subject: [PATCH 2/4] Check TM validity before printing
---
llvm/include/llvm/CodeGen/RegisterUsageInfo.h | 1 -
llvm/lib/CodeGen/RegisterUsageInfo.cpp | 10 ++++++----
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/RegisterUsageInfo.h b/llvm/include/llvm/CodeGen/RegisterUsageInfo.h
index ada87e5632b4c..04acaf380405e 100644
--- a/llvm/include/llvm/CodeGen/RegisterUsageInfo.h
+++ b/llvm/include/llvm/CodeGen/RegisterUsageInfo.h
@@ -34,7 +34,6 @@ class TargetMachine;
class PhysicalRegisterUsageInfo {
public:
-
~PhysicalRegisterUsageInfo();
/// Set TargetMachine which is used to print analysis.
void setTargetMachine(const TargetMachine &TM);
diff --git a/llvm/lib/CodeGen/RegisterUsageInfo.cpp b/llvm/lib/CodeGen/RegisterUsageInfo.cpp
index d48280642da52..48466381f4d3e 100644
--- a/llvm/lib/CodeGen/RegisterUsageInfo.cpp
+++ b/llvm/lib/CodeGen/RegisterUsageInfo.cpp
@@ -57,10 +57,12 @@ bool PhysicalRegisterUsageInfo::doFinalization(Module &M) {
}
PhysicalRegisterUsageInfo::~PhysicalRegisterUsageInfo() {
- if (DumpRegUsage)
- print(errs());
-
- RegMasks.shrink_and_clear();
+ // As doFinalization() is not called for analysis results in the new PM,
+ // we print the register usage information here.
+ if (DumpRegUsage && TM)
+ print(errs());
+
+ RegMasks.shrink_and_clear();
}
void PhysicalRegisterUsageInfo::storeUpdateRegUsageInfo(
>From 6564fd79ce14d66aa908379edad9ff41f375a98f Mon Sep 17 00:00:00 2001
From: Teja Alaghari <teja.alaghari at amd.com>
Date: Mon, 1 Dec 2025 16:20:09 +0530
Subject: [PATCH 3/4] Enable NPM for AMDGPU backend test case ipra-regmask.ll
---
llvm/test/CodeGen/AMDGPU/ipra-regmask.ll | 1 +
1 file changed, 1 insertion(+)
diff --git a/llvm/test/CodeGen/AMDGPU/ipra-regmask.ll b/llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
index dc4bf21ab1269..052f1dd1e1c92 100644
--- a/llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
+++ b/llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=amdgcn-amd-amdhsa -enable-ipra -print-regusage -filetype=null 2>&1 < %s | FileCheck %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -enable-new-pm=1 -enable-ipra -print-regusage -filetype=null 2>&1 < %s | FileCheck %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -stop-after=prologepilog -o - %s \
; RUN: | llc -x=mir -mtriple=amdgcn-amd-amdhsa -passes="module(require<reg-usage>,function(machine-function(reg-usage-collector)),print<reg-usage>)" -filetype=null 2>&1 \
>From 5b171ad88271b17be6ee3d4fe920a9bdb6ffb7d0 Mon Sep 17 00:00:00 2001
From: Teja Alaghari <teja.alaghari at amd.com>
Date: Tue, 16 Dec 2025 21:26:09 +0530
Subject: [PATCH 4/4] Use printer pass for -print-regusage instead of in
destructor
---
llvm/include/llvm/CodeGen/RegisterUsageInfo.h | 5 ++++-
llvm/include/llvm/Passes/CodeGenPassBuilder.h | 3 +++
llvm/lib/CodeGen/RegisterUsageInfo.cpp | 9 +--------
3 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/RegisterUsageInfo.h b/llvm/include/llvm/CodeGen/RegisterUsageInfo.h
index 04acaf380405e..49c00e0f480e3 100644
--- a/llvm/include/llvm/CodeGen/RegisterUsageInfo.h
+++ b/llvm/include/llvm/CodeGen/RegisterUsageInfo.h
@@ -24,6 +24,7 @@
#include "llvm/InitializePasses.h"
#include "llvm/Pass.h"
#include "llvm/PassRegistry.h"
+#include "llvm/Support/Compiler.h"
#include <cstdint>
#include <vector>
@@ -34,7 +35,6 @@ class TargetMachine;
class PhysicalRegisterUsageInfo {
public:
- ~PhysicalRegisterUsageInfo();
/// Set TargetMachine which is used to print analysis.
void setTargetMachine(const TargetMachine &TM);
@@ -110,6 +110,9 @@ class PhysicalRegisterUsageInfoPrinterPass
static bool isRequired() { return true; }
};
+/// Returns true if the -print-regusage flag is enabled.
+LLVM_ABI bool shouldPrintRegUsage();
+
} // end namespace llvm
#endif // LLVM_CODEGEN_REGISTERUSAGEINFO_H
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index 0e14f2e50ae04..7ee8304fb766a 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -1086,6 +1086,9 @@ Error CodeGenPassBuilder<Derived, TargetMachineT>::addMachinePasses(
// clobbered registers, to be used to optimize call sites.
addPass(RequireAnalysisPass<PhysicalRegisterUsageAnalysis, Module>());
addPass(RegUsageInfoCollectorPass());
+ // If -print-regusage is specified, print the collected register usage info.
+ if (shouldPrintRegUsage())
+ addPass(PhysicalRegisterUsageInfoPrinterPass(errs()));
}
addPass(FuncletLayoutPass());
diff --git a/llvm/lib/CodeGen/RegisterUsageInfo.cpp b/llvm/lib/CodeGen/RegisterUsageInfo.cpp
index 48466381f4d3e..d4788d17fd2ce 100644
--- a/llvm/lib/CodeGen/RegisterUsageInfo.cpp
+++ b/llvm/lib/CodeGen/RegisterUsageInfo.cpp
@@ -56,14 +56,7 @@ bool PhysicalRegisterUsageInfo::doFinalization(Module &M) {
return false;
}
-PhysicalRegisterUsageInfo::~PhysicalRegisterUsageInfo() {
- // As doFinalization() is not called for analysis results in the new PM,
- // we print the register usage information here.
- if (DumpRegUsage && TM)
- print(errs());
-
- RegMasks.shrink_and_clear();
-}
+bool llvm::shouldPrintRegUsage() { return DumpRegUsage; }
void PhysicalRegisterUsageInfo::storeUpdateRegUsageInfo(
const Function &FP, ArrayRef<uint32_t> RegMask) {
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