[llvm] [TableGen][SchedModel] Add logical combiners for SchedPredicates (PR #172106)

[Pengcheng Wang via llvm-commits]

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@@ -399,6 +399,19 @@ class SchedPredicate<code pred> : SchedPredicateBase {
 // MCSchedPredicate, this is the default scheduling case used by llvm-mca.
 def NoSchedPred : MCSchedPredicate<TruePred>;
 
+// Logical combiners for schedule predicates.
+class SchedPredicateCombiner<list<SchedPredicateBase> predicates>
+    : SchedPredicateBase {
+  SchedMachineModel SchedModel = ?;
+  list<SchedPredicateBase> Predicates = predicates;
+}
+class AllOfSchedPreds<list<SchedPredicateBase> predicates>
+    : SchedPredicateCombiner<predicates>;
+class AnyOfSchedPreds<list<SchedPredicateBase> predicates>
+    : SchedPredicateCombiner<predicates>;
+class NoneOfSchedPreds<list<SchedPredicateBase> predicates>
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wangpc-pp wrote:

Just a thought: `NoneOf` can be `Not<AnyOf>`. We can add a `Not` predicate if you think it useful. :-)

https://github.com/llvm/llvm-project/pull/172106