[llvm] [SDAG] fix miss opt: shl nuw + zext adds unnecessary masking (PR #172046)

[Matt Arsenault via llvm-commits]

================
@@ -1572,6 +1572,9 @@ SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT) {
   assert(VT.bitsLE(OpVT) && "Not extending!");
   if (OpVT == VT)
     return Op;
+  if (Op.getOpcode() == ISD::AssertZext &&
----------------
arsenm wrote:

But does it have to drop it? This seems more like a bug? 

https://github.com/llvm/llvm-project/pull/172046