[llvm] [X86] combineVectorSizedSetCCEquality - ensure the load is a normal load (PR #172212)

[Simon Pilgrim via llvm-commits]

https://github.com/RKSimon created https://github.com/llvm/llvm-project/pull/172212

Noticed while trying to replace the IsVectorBitCastCheap helper with mayFoldIntoVector (still some work to do as we have a number of multiuse cases) - technically its possible for a extload to reach this point.

>From d8c7e8c664717f1a4840e70d333ef9193180f708 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Sun, 14 Dec 2025 13:48:12 +0000
Subject: [PATCH] [X86] combineVectorSizedSetCCEquality - ensure the load is a
 normal load

Noticed while trying to replace the IsVectorBitCastCheap helper with mayFoldIntoVector (still some work to do as we have a number of multiuse cases) - technically its possible for a extload to reach this point.
---
 llvm/lib/Target/X86/X86ISelLowering.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index d383553d2e8b5..c28584cc14991 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -23125,7 +23125,7 @@ static SDValue combineVectorSizedSetCCEquality(EVT VT, SDValue X, SDValue Y,
   auto IsVectorBitCastCheap = [](SDValue X) {
     X = peekThroughBitcasts(X);
     return isa<ConstantSDNode>(X) || X.getValueType().isVector() ||
-           X.getOpcode() == ISD::LOAD;
+           ISD::isNormalLoad(X.getNode());
   };
   if ((!IsVectorBitCastCheap(X) || !IsVectorBitCastCheap(Y)) &&
       !IsOrXorXorTreeCCZero)