[llvm] [AMDGPU][NFC] Add an optional DSE pass during CodeGenPrepare (PR #172069)

[Gang Chen via llvm-commits]

cmc-rep wrote:

> This should have already happened in the middle end optimizer. This would also need a phase ordering test

I have made this extra DSE pass optional, and it is off by default. We need this downstream since we have added a major IR transform in the middle end optimizer that require extra DSE afterwards. I could add this downstream only. However, I feel that people may find it a useful option in some other cases.

https://github.com/llvm/llvm-project/pull/172069