[llvm] 1672767 - AArch64: Use AArch64InstrInfo instead of base class in frame lowering (#172183)

[via llvm-commits]

Author: Matt Arsenault
Date: 2025-12-13T23:16:25Z
New Revision: 16727674e09ddd61f998554c21d3cf3bdf392df8

URL: https://github.com/llvm/llvm-project/commit/16727674e09ddd61f998554c21d3cf3bdf392df8
DIFF: https://github.com/llvm/llvm-project/commit/16727674e09ddd61f998554c21d3cf3bdf392df8.diff

LOG: AArch64: Use AArch64InstrInfo instead of base class in frame lowering (#172183)

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    llvm/lib/Target/AArch64/AArch64FrameLowering.h
    llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
    llvm/lib/Target/AArch64/AArch64PrologueEpilogue.h

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index 799e116f05c27..e1b4d229e113b 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -990,7 +990,7 @@ bool AArch64FrameLowering::shouldSignReturnAddressEverywhere(
 // code on Windows.
 MachineBasicBlock::iterator
 AArch64FrameLowering::insertSEH(MachineBasicBlock::iterator MBBI,
-                                const TargetInstrInfo &TII,
+                                const AArch64InstrInfo &TII,
                                 MachineInstr::MIFlag Flag) const {
   unsigned Opc = MBBI->getOpcode();
   MachineBasicBlock *MBB = MBBI->getParent();
@@ -1181,7 +1181,7 @@ bool AArch64FrameLowering::requiresSaveVG(const MachineFunction &MF) const {
 void AArch64FrameLowering::emitPacRetPlusLeafHardening(
     MachineFunction &MF) const {
   const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
-  const TargetInstrInfo *TII = Subtarget.getInstrInfo();
+  const AArch64InstrInfo *TII = Subtarget.getInstrInfo();
 
   auto EmitSignRA = [&](MachineBasicBlock &MBB) {
     DebugLoc DL; // Set debug location to unknown.
@@ -1947,8 +1947,9 @@ bool AArch64FrameLowering::spillCalleeSavedRegisters(
     MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
     ArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
   MachineFunction &MF = *MBB.getParent();
-  auto &TLI = *MF.getSubtarget<AArch64Subtarget>().getTargetLowering();
-  const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
+  const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
+  auto &TLI = *Subtarget.getTargetLowering();
+  const AArch64InstrInfo &TII = *Subtarget.getInstrInfo();
   bool NeedsWinCFI = needsWinCFI(MF);
   DebugLoc DL;
   SmallVector<RegPairInfo, 8> RegPairs;
@@ -2165,7 +2166,8 @@ bool AArch64FrameLowering::restoreCalleeSavedRegisters(
     MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
     MutableArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
   MachineFunction &MF = *MBB.getParent();
-  const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
+  const AArch64InstrInfo &TII =
+      *MF.getSubtarget<AArch64Subtarget>().getInstrInfo();
   DebugLoc DL;
   SmallVector<RegPairInfo, 8> RegPairs;
   bool NeedsWinCFI = needsWinCFI(MF);
@@ -3033,7 +3035,8 @@ void AArch64FrameLowering::processFunctionBeforeFrameFinalized(
   RS->backward(MBBI);
   Register DstReg = RS->FindUnusedReg(&AArch64::GPR64commonRegClass);
   assert(DstReg && "There must be a free register after frame setup");
-  const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
+  const AArch64InstrInfo &TII =
+      *MF.getSubtarget<AArch64Subtarget>().getInstrInfo();
   BuildMI(MBB, MBBI, DL, TII.get(AArch64::MOVi64imm), DstReg).addImm(-2);
   BuildMI(MBB, MBBI, DL, TII.get(AArch64::STURXi))
       .addReg(DstReg, getKillRegState(true))

diff  --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.h b/llvm/lib/Target/AArch64/AArch64FrameLowering.h
index b2002dfd7039f..7ef2c4f388c7c 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.h
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.h
@@ -21,6 +21,7 @@ namespace llvm {
 
 class TargetLowering;
 class AArch64FunctionInfo;
+class AArch64InstrInfo;
 class AArch64PrologueEmitter;
 class AArch64EpilogueEmitter;
 
@@ -235,7 +236,7 @@ class AArch64FrameLowering : public TargetFrameLowering {
   // Given a load or a store instruction, generate an appropriate unwinding SEH
   // code on Windows.
   MachineBasicBlock::iterator insertSEH(MachineBasicBlock::iterator MBBI,
-                                        const TargetInstrInfo &TII,
+                                        const AArch64InstrInfo &TII,
                                         MachineInstr::MIFlag Flag) const;
 
   /// Returns how much of the incoming argument stack area (in bytes) we should

diff  --git a/llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp b/llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
index bb4f7e241fbca..d7b2ddcd06334 100644
--- a/llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
+++ b/llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
@@ -162,8 +162,7 @@ AArch64PrologueEpilogueCommon::convertCalleeSaveRestoreToSPPrePostIncDec(
   }
   TypeSize Scale = TypeSize::getFixed(1), Width = TypeSize::getFixed(0);
   int64_t MinOffset, MaxOffset;
-  bool Success = static_cast<const AArch64InstrInfo *>(TII)->getMemOpInfo(
-      NewOpc, Scale, Width, MinOffset, MaxOffset);
+  bool Success = TII->getMemOpInfo(NewOpc, Scale, Width, MinOffset, MaxOffset);
   (void)Success;
   assert(Success && "unknown load/store opcode");
 

diff  --git a/llvm/lib/Target/AArch64/AArch64PrologueEpilogue.h b/llvm/lib/Target/AArch64/AArch64PrologueEpilogue.h
index 7f297b5d337b0..326a6ea3e25ee 100644
--- a/llvm/lib/Target/AArch64/AArch64PrologueEpilogue.h
+++ b/llvm/lib/Target/AArch64/AArch64PrologueEpilogue.h
@@ -22,10 +22,11 @@
 
 namespace llvm {
 
-class TargetLowering;
-class AArch64Subtarget;
 class AArch64FunctionInfo;
 class AArch64FrameLowering;
+class AArch64InstrInfo;
+class AArch64Subtarget;
+class TargetLowering;
 
 struct SVEFrameSizes {
   struct {
@@ -93,7 +94,7 @@ class AArch64PrologueEpilogueCommon {
   // Note: "HasWinCFI" is mutable as it can change in any "emit" function.
   mutable bool HasWinCFI = false;
 
-  const TargetInstrInfo *TII = nullptr;
+  const AArch64InstrInfo *TII = nullptr;
   AArch64FunctionInfo *AFI = nullptr;
 };