[llvm] [AMDGPU] Add regbankselect rules for G_ICMP/G_FCMP (PR #172048)

[Anshil Gandhi via llvm-commits]

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@@ -0,0 +1,84 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -global-isel -new-reg-bank-select < %s | FileCheck %s
+
+define i1 @fcmp_f16_uniform(half inreg %a, half inreg %b) {
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gandhi56 wrote:

The latest revision maps the f16 operands to Sgpr16 if the subtarget supports scalar compare instructions. Otherwise they are mapped to Vgpr16. There are MIR and LL tests demanding coverage for G_FCMP, I figured it would be nice to have a file illustrating the IR -> ISA mapping via GlobalISel.

https://github.com/llvm/llvm-project/pull/172048