[llvm] [SelectionDAG] Fix condition used for unsigned subtraction overflow (PR #170896)

[via llvm-commits]

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@@ -75,23 +75,12 @@ define i32 @combine_uadd_not(i32 %a0, i32 %a1) {
 define <4 x i32> @combine_vec_uadd_not(<4 x i32> %a0, <4 x i32> %a1) {
 ; SSE-LABEL: combine_vec_uadd_not:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    pxor %xmm2, %xmm2
-; SSE-NEXT:    psubd %xmm0, %xmm2
-; SSE-NEXT:    pmovsxbd {{.*#+}} xmm0 = [1,1,1,1]
-; SSE-NEXT:    pmaxud %xmm2, %xmm0
-; SSE-NEXT:    pcmpeqd %xmm2, %xmm0
-; SSE-NEXT:    blendvps %xmm0, %xmm2, %xmm1
 ; SSE-NEXT:    movaps %xmm1, %xmm0
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: combine_vec_uadd_not:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vpxor %xmm2, %xmm2, %xmm2
-; AVX-NEXT:    vpsubd %xmm0, %xmm2, %xmm0
-; AVX-NEXT:    vpbroadcastd {{.*#+}} xmm2 = [1,1,1,1]
-; AVX-NEXT:    vpmaxud %xmm2, %xmm0, %xmm2
-; AVX-NEXT:    vpcmpeqd %xmm2, %xmm0, %xmm2
-; AVX-NEXT:    vblendvps %xmm2, %xmm0, %xmm1, %xmm0
+; AVX-NEXT:    vmovaps %xmm1, %xmm0
 ; AVX-NEXT:    retq
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aabhinavg1 wrote:

> Any luck with tracking down the bug?

Tested in Alive2 the transform is invalid.
```python
uadd_overflow(~x, 1) does not always overflow (counterexample: x = 8).
```
Overflow only occurs when x == 0.
Looking at how can i fix it.

https://alive2.llvm.org/ce/

https://github.com/llvm/llvm-project/pull/170896