[llvm] [SDAG] fix miss opt: shl nuw + zext adds unnecessary masking (PR #172046)

[via llvm-commits]

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@@ -1673,8 +1673,10 @@ SDValue DAGCombiner::PromoteIntShiftOp(SDValue Op) {
 
     SDLoc DL(Op);
     SDValue N1 = Op.getOperand(1);
-    SDValue RV =
-        DAG.getNode(ISD::TRUNCATE, DL, VT, DAG.getNode(Opc, DL, PVT, N0, N1));
+    SDValue POp = DAG.getNode(Opc, DL, PVT, N0, N1);
+    if (Opc == ISD::SHL && Op->getFlags().hasNoUnsignedWrap())
+      POp = DAG.getNode(ISD::AssertZext, DL, PVT, POp, DAG.getValueType(VT));
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actinks wrote:

done @arsenm @topperc 

https://github.com/llvm/llvm-project/pull/172046