[llvm] [DAGCombiner] Handle type-promoted constants in UDIV lowering (PR #169491)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 12 20:48:48 PST 2025
topperc wrote:
> > We're hitting an assert after this change:
> > ```
> > llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:989: void (anonymous namespace)::SelectionDAGLegalize::LegalizeOp(SDNode *): Assertion `(TLI.getTypeAction(*DAG.getContext(), Op.getValueType()) == TargetLowering::TypeLegal || Op.getOpcode() == ISD::TargetConstant || Op.getOpcode() == ISD::Register) && "Unexpected illegal type!"' failed.
> > ```
>
> We ran into the same issue on LoongArch, and here's a [reduced reproducer](https://github.com/llvm/llvm-project/issues/170976) that may help with the investigation.
>
> After this PR, DAGCombiner ends up expanding `UDIV` after type legalization, introducing nodes that include logical right shifts on illegal types.
>
> On the LoongArch side, we addressed this by implementing custom target-specific lowering for logical shift right nodes (#171097), preventing the generic DAG-level optimizations from generating such illegal constructs.
We should just need to make the BUILD_VECTOR created by the UDIV combine use a legal type for the scalar elements when NewNodesMustHaveLegalTypes is set.
https://github.com/llvm/llvm-project/pull/169491
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