[llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)

[Krzysztof Drewniak via llvm-commits]

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@@ -73,6 +73,15 @@ class VOP_Pseudo <string opName, string suffix, VOPProfile P, dag outs, dag ins,
   bit IsTrue16 = P.IsTrue16;
   VOPProfile Pfl = P;
 
+  // True if destination is FP16 and all sources are 16-bit (FP16, BF16, or INT16).
+  // Used for V_PACK_B32_F16 optimization in SIPeepholeSDWA Pass.
+  bit IsSrcDestFP16 = !and(
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krzysz00 wrote:

On the C++ side, the question I have is if that tablegen `or` can be replaced with a C++ function that queries the same information and `or`s it together.

https://github.com/llvm/llvm-project/pull/137137