[llvm] [LV] Add extra check for signed oveflow for SDiv/SRem (PR #170818)

Shih-Po Hung via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 12 16:56:40 PST 2025


================
@@ -2878,11 +2878,40 @@ bool LoopVectorizationCostModel::isPredicatedInst(Instruction *I) const {
              TheLoop->isLoopInvariant(cast<StoreInst>(I)->getValueOperand()));
   }
   case Instruction::UDiv:
-  case Instruction::SDiv:
-  case Instruction::SRem:
   case Instruction::URem:
     // If the divisor is loop-invariant no predication is needed.
     return !Legal->isInvariant(I->getOperand(1));
----------------
arcbbb wrote:

> Meta comment: I think your change might be trying to do too much. It looks like you're trying to handle some of the loop varying cases where the udiv case doesn't. My suggestion would be something like the following:
> 
> ```
> if (!Legal->isInvariant(I->getOperand(1)))
>    return true;
> return RHSCouldBeMinusOne && LHSCouldBeSignedMin;
> ```
> 
> In particular, I think the poison comments may be a red herring as the udiv case doesn't ensure the invariant RHS is non-poison either.

My understanding: we check the SCEV range only when no lanes can be poison.
If any poison is present, the range is considered full.
Based on this, udiv case needs to ensure the invariant RHS is non-poison, otherwise zero is possible.

https://github.com/llvm/llvm-project/pull/170818


More information about the llvm-commits mailing list