[llvm] [AArch64][SVE] Fix -msve-vector-bits=256 fixed width vector crash (PR #171776)

[Cullen Rhodes via llvm-commits]

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@@ -0,0 +1,70 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s
+
+define <8 x bfloat> @fptrunc_poison_shuffle_v8bf16(<4 x float> %a) #0 {
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c-rhodes wrote:

nit: i think you're testing more than necessary to reproduce the crash here, I think https://godbolt.org/z/6doPa7c37 would do, and perhaps an equivalent one for f16 so we also have coverage for that. I'd also rename the test to `sve-fixed-length-fptrunc.ll` so it's in keeping with the other fixed-length SVE tests.

https://github.com/llvm/llvm-project/pull/171776