[clang] [llvm] [X86] EmitX86BuiltinExpr - attempt to convert SSE41/AVX1 roundps/d/ss/sd builtins to regular rounding modes (PR #171227)
Gergo Stomfai via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 12 02:49:05 PST 2025
================
@@ -75,6 +75,52 @@ static Value *getMaskVecValue(CodeGenFunction &CGF, Value *Mask,
return MaskVec;
}
+// Emit rounding for the value X according to the rounding RoundingControl.
+static Value *emitX86Round(CodeGenFunction &CGF, Value *X,
+ unsigned RoundingControl) {
+ unsigned RoundingMask = 0b11;
+ unsigned UseMXCSRBit = 0b1000;
+
+ unsigned RoundingMode = RoundingControl & RoundingMask;
+ bool UseMXCSR = RoundingControl & UseMXCSRBit;
+
+ Intrinsic::ID ID = Intrinsic::not_intrinsic;
+ LLVMContext &Ctx = CGF.CGM.getLLVMContext();
+
+ if (UseMXCSR) {
----------------
stomfaig wrote:
Just to clarify:
- In FPConstrained mode:
- if MXCSR set: use `dynamic`
- if MXCSR not set: use `constraint.floor/ceil/etc.`
- if FPConstrained not set: Ignore MXCSR bit, and return `floor/etc.` based on the immediate value?
https://github.com/llvm/llvm-project/pull/171227
More information about the llvm-commits
mailing list