[llvm] [MCA][AArch64] Fixes Neoverse N2 pair-load RThroughput (PR #171853)

[Cullen Rhodes via llvm-commits]

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@@ -796,6 +796,15 @@ def : InstRW<[N2Write_2c_1M], (instregex "^BFM[WX]ri$")>;
 def : SchedAlias<WriteLD,    N2Write_4c_1L>;
 def : SchedAlias<WriteLDIdx, N2Write_4c_1I_1L>;
 
+// Load pair, signed immed offset, normal, X-form
+def : InstRW<[N2Write_4c_1L, N2Write_4c_1L, WriteLDHi],
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c-rhodes wrote:

nit: we typically create a generic type here so this becomes: 

```suggestion
def : InstRW<[N2Write_4c_2L, WriteLDHi],
```

you can see how it's done for N3 here https://github.com/llvm/llvm-project/blob/123d4d9b85e090a7e75e256a80a146ffcc8ac5c3/llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td#L871-L872

https://github.com/llvm/llvm-project/pull/171853