[llvm] [WIP][AMDGPU][CopyPhysReg] Expand the COPY instructions using the encoded liveness mask. (PR #151124)
Vikash Gupta via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 12 00:28:07 PST 2025
vg0204 wrote:
> I don't understand the overall plan here. It seems like this would only work correctly if liveness does not change between VirtRegRewriter and ExpandPostRAPseudos. But lots of passes run in that window, including ones like MachineLICM that can make major code changes.
That's the idea that if we ensure that each pass in-between can ensure the correct liveness update, this should hold true to be correct. Also, its one of my initial ideas to avoid using implicit-opernad (via using the pre-calculated liveness at sub-register granularity), since VirtRegRewriter is the last pass which holds mapping between virtual & allocated physical registers to be used, avoiding the recalculation.
I am open for suggestions/feedback to take care of it alternatively!
Refer : https://discourse.llvm.org/t/physical-subregister-liveness/59657
https://github.com/llvm/llvm-project/pull/151124
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