[llvm] [AArch64][SVE] Rework VECTOR_COMPRESS lowering (PR #171162)

[Paul Walker via llvm-commits]

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@@ -7516,28 +7504,10 @@ SDValue AArch64TargetLowering::LowerVECTOR_COMPRESS(SDValue Op,
         DAG.getConstant(0, DL, MVT::i64), Offset);
 
     Compressed =
-        DAG.getNode(ISD::VSELECT, DL, VecVT, IndexMask, Compressed, Passthru);
-  }
-
-  // If we changed the element type before, we need to convert it back.
-  if (ElmtVT.isFloatingPoint())
-    Compressed = convertFromSVEContainerType(DL, Compressed, VecVT, DAG);
-
-  // Extracting from a legal SVE type before truncating produces better code.
-  if (IsFixedLength) {
-    EVT FixedSubVector = VecVT.isInteger()
-                             ? FixedVecVT.changeVectorElementType(
-                                   ContainerVT.getVectorElementType())
-                             : FixedVecVT;
-    Compressed = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, FixedSubVector,
-                             Compressed, DAG.getConstant(0, DL, MVT::i64));
-    VecVT = FixedVecVT;
+        DAG.getNode(ISD::VSELECT, DL, VT, IndexMask, Compressed, Passthru);
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paulwalker-arm wrote:

I cannot add this to the correct line but perhaps replace the while intrinsic call with `getNode(ISD::GET_ACTIVE_LANE_MASK, ...` for further cleanup?

https://github.com/llvm/llvm-project/pull/171162