[llvm] [LoongArch] Add support for the ud macro instruction (PR #171583)

[via llvm-commits]

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@@ -157,6 +157,29 @@ static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm,
   return MCDisassembler::Success;
 }
 
+// Decode AMOSWAP.W and UD, which share the same base encoding.
+// If rk == 1 and rd == rj, interpret the instruction as UD;
+// otherwise decode as AMSWAP.W.
+static DecodeStatus DecodeAMOrUDInstruction(MCInst &Inst, unsigned Insn,
+                                            uint64_t Address,
+                                            const MCDisassembler *Decoder) {
+  unsigned rd = fieldFromInstruction(Insn, 0, 5);
+  unsigned rj = fieldFromInstruction(Insn, 5, 5);
+  unsigned rk = fieldFromInstruction(Insn, 10, 5);
+
+  if (rk == 1 && rd == rj) {
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heiher wrote:

During our offline discussion, we weighed the limited need for additional encoding bits for the UD instruction against the implementation complexity. As a result of that trade-off, we decided to define UD only for the case where `rk == 1 && rj == rd`.

https://github.com/llvm/llvm-project/pull/171583