[llvm] 02b4dd0 - [AArch64] Restrict TBI to ignore top 4 bits for Darwin targets.

[Amara Emerson via llvm-commits]

Author: Amara Emerson
Date: 2025-12-10T16:14:37-08:00
New Revision: 02b4dd04626c31f225db2bb8e9e0b82cddd28c25

URL: https://github.com/llvm/llvm-project/commit/02b4dd04626c31f225db2bb8e9e0b82cddd28c25
DIFF: https://github.com/llvm/llvm-project/commit/02b4dd04626c31f225db2bb8e9e0b82cddd28c25.diff

LOG: [AArch64] Restrict TBI to ignore top 4 bits for Darwin targets.

In order to allow arm64 code to run on MTE environments, we need to make the
compiler only assume the top 4 bits can be ignored as MTE occupies the lower 4.

rdar://164645323

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    llvm/test/CodeGen/AArch64/tbi.ll

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 30eb19036ddda..3012343386c07 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -24759,7 +24759,12 @@ static SDValue performPostLD1Combine(SDNode *N,
 static bool performTBISimplification(SDValue Addr,
                                      TargetLowering::DAGCombinerInfo &DCI,
                                      SelectionDAG &DAG) {
-  APInt DemandedMask = APInt::getLowBitsSet(64, 56);
+  const auto &Subtarget = DAG.getSubtarget<AArch64Subtarget>();
+  // If MTE is enabled, TBI only applies to the top 4 bits.
+  // Both arm64 and arm64e processes on Darwin may run with MTE enabled.
+  unsigned NumIgnoreBits =
+      Subtarget.hasMTE() || Subtarget.isTargetDarwin() ? 4 : 8;
+  APInt DemandedMask = APInt::getLowBitsSet(64, 64 - NumIgnoreBits);
   KnownBits Known;
   TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(),
                                         !DCI.isBeforeLegalizeOps());

diff  --git a/llvm/test/CodeGen/AArch64/tbi.ll b/llvm/test/CodeGen/AArch64/tbi.ll
index 285726a485b87..a7c9b4cddf808 100644
--- a/llvm/test/CodeGen/AArch64/tbi.ll
+++ b/llvm/test/CodeGen/AArch64/tbi.ll
@@ -7,7 +7,7 @@
 ; TBI-NOT: and x
 ; NO_TBI: and x
 define i32 @ld_and32(i64 %p) {
-  %and = and i64 %p, 72057594037927935
+  %and = and i64 %p, 1152921504606846975
   %cast = inttoptr i64 %and to ptr
   %load = load i32, ptr %cast
   ret i32 %load
@@ -18,7 +18,7 @@ define i32 @ld_and32(i64 %p) {
 ; TBI-NOT: and x
 ; NO_TBI: and x
 define i32 @ld_and_plus_offset(i64 %p) {
-  %and = and i64 %p, 72057594037927935
+  %and = and i64 %p, 1152921504606846975
   %cast = inttoptr i64 %and to ptr
   %gep = getelementptr i32, ptr %cast, i64 4
   %load = load i32, ptr %gep
@@ -40,7 +40,7 @@ define i32 @ld_and32_wider(i64 %p) {
 ; TBI-NOT: and x
 ; NO_TBI: and x
 define i64 @ld_and64(i64 %p) {
-  %and = and i64 %p, 72057594037927935
+  %and = and i64 %p, 1152921504606846975
   %cast = inttoptr i64 %and to ptr
   %load = load i64, ptr %cast
   ret i64 %load
@@ -50,7 +50,7 @@ define i64 @ld_and64(i64 %p) {
 ; TBI-NOT: and x
 ; NO_TBI: and x
 define void @st_and32(i64 %p, i32 %v) {
-  %and = and i64 %p, 72057594037927935
+  %and = and i64 %p, 1152921504606846975
   %cast = inttoptr i64 %and to ptr
   store i32 %v, ptr %cast
   ret void
@@ -62,7 +62,7 @@ define void @st_and32(i64 %p, i32 %v) {
 ; NO_TBI: and x
 define i32 @ld_ro(i64 %a, i64 %b) {
   %p = add i64 %a, %b
-  %and = and i64 %p, 72057594037927935
+  %and = and i64 %p, 1152921504606846975
   %cast = inttoptr i64 %and to ptr
   %load = load i32, ptr %cast
   ret i32 %load
@@ -73,7 +73,7 @@ define i32 @ld_ro(i64 %a, i64 %b) {
 ; TBI-NOT: and x
 ; NO_TBI: and x
 define i32 @ld_ro2(i64 %a, i64 %b) {
-  %and = and i64 %a, 72057594037927935
+  %and = and i64 %a, 1152921504606846975
   %p = add i64 %and, %b
   %cast = inttoptr i64 %p to ptr
   %load = load i32, ptr %cast
@@ -85,7 +85,7 @@ define i32 @ld_ro2(i64 %a, i64 %b) {
 ; TBI-NOT: and x
 ; NO_TBI: and x
 define i32 @ld_indirect_and(i64 %r1, i64 %r2) {
-  %and = and i64 %r1, 72057594037927935
+  %and = and i64 %r1, 1152921504606846975
   %p = or i64 %and, %r2
   %cast = inttoptr i64 %p to ptr
   %load = load i32, ptr %cast