[llvm] [AArch64][GlobalISel] Fix incorrect codegen for FPR16/FPR8 to GPR copies (PR #171499)

[Ian Butterworth via llvm-commits]

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@@ -568,6 +568,10 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
         return Query.Types[0] == s128 &&
                Query.MMODescrs[0].Ordering != AtomicOrdering::NotAtomic;
       })
+      .widenScalarIf(
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IanButterworth wrote:

It seems widenScalarIf must be before legalForTypesWithMemDesc so I moved it back here. Does that sound right?

https://github.com/llvm/llvm-project/pull/171499