[llvm] [NFC][RISCV] Unify all zvfbfa vl patterns and sd node patterns (PR #171072)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 10 11:17:11 PST 2025
================
@@ -1333,34 +1348,46 @@ foreach vti = AllFloatVectors in {
// 13.12. Vector Floating-Point Sign-Injection Instructions
def : Pat<(fabs (vti.Vector vti.RegClass:$rs)),
- (!cast<Instruction>("PseudoVFSGNJX_VV_"# vti.LMul.MX#"_E"#vti.SEW)
+ (!cast<Instruction>("PseudoVFSGNJX_"#
+ !if(!eq(vti.Scalar, bf16), "ALT_", "")#
+ "VV_"# vti.LMul.MX#"_E"#vti.SEW)
----------------
topperc wrote:
I think I'd rather insert "_ALT" instead of "ALT_". That's makes it more similar to the "BF16" insertion in `VPatWidenFPMulAccSDNode_VV_VF_RM`
```suggestion
(!cast<Instruction>("PseudoVFSGNJX"#
!if(!eq(vti.Scalar, bf16), "_ALT", "")#
"_VV_"# vti.LMul.MX#"_E"#vti.SEW)
```
https://github.com/llvm/llvm-project/pull/171072
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