[llvm] [AArch64] Fix assertion failure during promotion of EXTEND_VECTOR_INREG. (PR #171619)

[via llvm-commits]

https://github.com/Michael-Chen-NJU updated https://github.com/llvm/llvm-project/pull/171619

>From 0fa0ed67b4410db36e5ba9225219536861b9b1a7 Mon Sep 17 00:00:00 2001
From: Michael-Chen-NJU <2802328816 at qq.com>
Date: Wed, 10 Dec 2025 21:30:50 +0800
Subject: [PATCH 1/2] [AArch64] Fix assertion failure during promotion of
 EXTEND_VECTOR_INREG.

---
 .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp  |  9 +++++++++
 llvm/test/CodeGen/AArch64/issue-171032.ll          | 14 ++++++++++++++
 2 files changed, 23 insertions(+)
 create mode 100644 llvm/test/CodeGen/AArch64/issue-171032.ll

diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 08c6b90cc8a74..d97d1181cd4c0 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -6216,6 +6216,15 @@ SDValue DAGTypeLegalizer::PromoteIntRes_EXTEND_VECTOR_INREG(SDNode *N) {
       default:
         llvm_unreachable("Node has unexpected Opcode");
     }
+    if (Promoted.getValueType().getSizeInBits() > NVT.getSizeInBits()) {
+      unsigned NewSize = NVT.getSizeInBits();
+      EVT ExtractVT = EVT::getVectorVT(
+          *DAG.getContext(), Promoted.getValueType().getScalarType(),
+          NewSize / Promoted.getScalarValueSizeInBits());
+
+      Promoted = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ExtractVT, Promoted,
+                             DAG.getVectorIdxConstant(0, dl));
+    }
     return DAG.getNode(N->getOpcode(), dl, NVT, Promoted);
   }
 
diff --git a/llvm/test/CodeGen/AArch64/issue-171032.ll b/llvm/test/CodeGen/AArch64/issue-171032.ll
new file mode 100644
index 0000000000000..fe3c65f24f8d3
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/issue-171032.ll
@@ -0,0 +1,14 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=aarch64-unknown-linux-musl < %s | FileCheck %s
+
+define <64 x i1> @func_20(<2 x i1> %0) {
+; CHECK-LABEL: func_20:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT:    mov v0.b[1], v0.b[4]
+; CHECK-NEXT:    str d0, [x8]
+; CHECK-NEXT:    ret
+entry:
+  %.splat = shufflevector <2 x i1> %0, <2 x i1> zeroinitializer, <64 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+  ret <64 x i1> %.splat
+}

>From 435a6f16e614284088fba824a953547964239d1e Mon Sep 17 00:00:00 2001
From: Michael-Chen-NJU <2802328816 at qq.com>
Date: Thu, 11 Dec 2025 00:09:11 +0800
Subject: [PATCH 2/2] [AArch64] fix tests

---
 llvm/test/CodeGen/AArch64/issue-171032.ll | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/test/CodeGen/AArch64/issue-171032.ll b/llvm/test/CodeGen/AArch64/issue-171032.ll
index fe3c65f24f8d3..ba160987640d9 100644
--- a/llvm/test/CodeGen/AArch64/issue-171032.ll
+++ b/llvm/test/CodeGen/AArch64/issue-171032.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-unknown-linux-musl < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-unknown-linux < %s | FileCheck %s
 
 define <64 x i1> @func_20(<2 x i1> %0) {
 ; CHECK-LABEL: func_20: