[llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_FSUB (PR #171244)

[Matt Arsenault via llvm-commits]

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@@ -948,6 +948,14 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
            hasSALUFloat)
       .Div(V2S16, {{VgprV2S16}, {VgprV2S16, VgprV2S16}});
 
+  addRulesForGOpcs({G_FSUB}, Standard)
+      .Uni(S16, {{UniInVgprS16}, {Vgpr16, Vgpr16}}, !hasSALUFloat)
+      .Uni(S16, {{Sgpr16}, {Sgpr16, Sgpr16}}, hasSALUFloat)
+      .Div(S16, {{Vgpr16}, {Vgpr16, Vgpr16}})
+      .Uni(S32, {{Sgpr32}, {Sgpr32, Sgpr32}}, hasSALUFloat)
+      .Uni(S32, {{UniInVgprS32}, {Vgpr32, Vgpr32}}, !hasSALUFloat)
+      .Div(S32, {{Vgpr32}, {Vgpr32, Vgpr32}});
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arsenm wrote:

Sort the simple, common cases to the top. v32 case should be first, not last, etc. the predicated hasSALUFloat cases should be last 

https://github.com/llvm/llvm-project/pull/171244