[llvm] [AArch64] Add lowering for NEON saturating shift intrinsics (PR #171485)

[Kerry McLaughlin via llvm-commits]

================
@@ -4570,11 +4571,18 @@ static SDValue lowerIntNeonIntrinsic(SDValue Op, unsigned Opcode,
   auto bitcastToFloat = [&](SDValue Val) {
     return DAG.getBitcast(getFloatVT(Val.getValueType()), Val);
   };
+
+  const unsigned NumOps = Op.getNumOperands();
+  const unsigned LastOpIdx = NumOps - 1;
   SmallVector<SDValue, 2> NewOps;
-  NewOps.reserve(Op.getNumOperands() - 1);
+  NewOps.reserve(NumOps - 1);
 
-  for (unsigned I = 1, E = Op.getNumOperands(); I < E; ++I)
+  // Skip first operand as it is intrinsic ID.
+  for (unsigned I = 1, E = LastOpIdx; I < E; ++I)
     NewOps.push_back(bitcastToFloat(Op.getOperand(I)));
+  SDValue LastOp = IsLastInt ? Op.getOperand(LastOpIdx)
+                             : bitcastToFloat(Op.getOperand(LastOpIdx));
----------------
kmclaughlin-arm wrote:

Could this instead check whether the last operand needs a bitcast based on the type, without passing the extra `IsLastInt` parameter?

i.e.
```suggestion
SDValue LastOp = Op.getOperand(LastOpIdx);
LastOp = isa<ConstantSDNode>(LastOp) ? LastOp : bitcastToFloat(LastOp);
```

https://github.com/llvm/llvm-project/pull/171485