[llvm] [RISCV] Add OperandType for XSfmm TWiden. (PR #171572)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 9 23:00:55 PST 2025
https://github.com/topperc created https://github.com/llvm/llvm-project/pull/171572
Use the same twiden format for PseudoSF_VSETTM and PseudoSF_VSETTK
as other XSfmm pseudos. Though I don't think we use the operand from
these instructions.
Stacked on #171570
>From d957bffe3afebfd47a74755632b7969dd242b63f Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Tue, 9 Dec 2025 22:27:54 -0800
Subject: [PATCH 1/2] [RISCV] Use 'sew' insead of ixlenimm in Xsfmm pseudos.
---
llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td | 18 ++---
.../RISCV/rvv/sifive-xsfmm-vset-insert.mir | 70 +++++++++----------
2 files changed, 44 insertions(+), 44 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td b/llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
index 445e513d36a38..17553a885a49e 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
@@ -278,7 +278,7 @@ let Uses = [FRM], mayRaiseFPException = true in {
} // DecoderNamespace = "XSfvector"
class VPseudoSF_VTileLoad
- : RISCVVPseudo<(outs), (ins GPR:$rs2, GPR:$rs1, GPRNoX0:$atn, ixlenimm:$sew,
+ : RISCVVPseudo<(outs), (ins GPR:$rs2, GPR:$rs1, GPRNoX0:$atn, sew:$sew,
ixlenimm:$twiden)> {
let mayLoad = 1;
let mayStore = 0;
@@ -289,7 +289,7 @@ class VPseudoSF_VTileLoad
}
class VPseudoSF_VTileStore
- : RISCVVPseudo<(outs), (ins GPR:$rs2, GPR:$rs1, GPRNoX0:$atn, ixlenimm:$sew,
+ : RISCVVPseudo<(outs), (ins GPR:$rs2, GPR:$rs1, GPRNoX0:$atn, sew:$sew,
ixlenimm:$twiden)> {
let mayLoad = 0;
let mayStore = 1;
@@ -300,7 +300,7 @@ class VPseudoSF_VTileStore
}
class VPseudoSF_VTileMove_V_T
- : RISCVVPseudo<(outs VRM8:$vd), (ins GPR:$rs1, GPRNoX0:$atn, ixlenimm:$sew,
+ : RISCVVPseudo<(outs VRM8:$vd), (ins GPR:$rs1, GPRNoX0:$atn, sew:$sew,
ixlenimm:$twiden)> {
let mayLoad = 0;
let mayStore = 0;
@@ -311,7 +311,7 @@ class VPseudoSF_VTileMove_V_T
}
class VPseudoSF_VTileMove_T_V
- : RISCVVPseudo<(outs), (ins GPR:$rs1, VRM8:$vs2, GPRNoX0:$atn, ixlenimm:$sew,
+ : RISCVVPseudo<(outs), (ins GPR:$rs1, VRM8:$vs2, GPRNoX0:$atn, sew:$sew,
ixlenimm:$twiden)> {
let mayLoad = 0;
let mayStore = 0;
@@ -324,7 +324,7 @@ class VPseudoSF_VTileMove_T_V
class VPseudoSF_MatMul<RegisterClass mtd_class>
: RISCVVPseudo<(outs),
(ins mtd_class:$rd, VRM8:$vs2, VRM8:$vs1, GPRNoX0:$atm,
- GPRNoX0:$atn, GPRNoX0:$atk, ixlenimm:$sew,
+ GPRNoX0:$atn, GPRNoX0:$atk, sew:$sew,
ixlenimm:$twiden)> {
let mayLoad = 0;
let mayStore = 0;
@@ -339,7 +339,7 @@ class VPseudoSF_MatMul<RegisterClass mtd_class>
class VPseudoSF_MatMul_FRM<RegisterClass mtd_class>
: RISCVVPseudo<(outs),
(ins mtd_class:$rd, VRM8:$vs2, VRM8:$vs1, ixlenimm:$frm,
- GPRNoX0:$atm, GPRNoX0:$atn, GPRNoX0:$atk, ixlenimm:$sew,
+ GPRNoX0:$atm, GPRNoX0:$atn, GPRNoX0:$atk, sew:$sew,
ixlenimm:$twiden), []> {
let mayLoad = 0;
let mayStore = 0;
@@ -376,12 +376,12 @@ let Defs = [VL, VTYPE] in {
let Defs = [VTYPE], Uses = [VTYPE], HasTWidenOp = 1, HasSEWOp = 1 in {
def PseudoSF_VSETTM
: Pseudo<(outs GPR:$rd),
- (ins GPR:$rs1, ixlenimm:$log2sew, ixlenimm:$twiden), []>,
+ (ins GPR:$rs1, sew:$sew, ixlenimm:$twiden), []>,
PseudoInstExpansion<(SF_VSETTM GPR:$rd, GPR:$rs1)>,
Sched<[WriteVSETVLI, ReadVSETVLI]>;
def PseudoSF_VSETTK
: Pseudo<(outs GPR:$rd),
- (ins GPR:$rs1, ixlenimm:$logwsew, ixlenimm:$twiden), []>,
+ (ins GPR:$rs1, sew:$sew, ixlenimm:$twiden), []>,
PseudoInstExpansion<(SF_VSETTK GPR:$rd, GPR:$rs1)>,
Sched<[WriteVSETVLI, ReadVSETVLI]>;
}
@@ -414,7 +414,7 @@ let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in {
let HasVLOp = 1, HasTmOp = 1, HasTWidenOp = 1, HasSEWOp = 1 in
def PseudoSF_VTZERO_T
: RISCVVPseudo<(outs),
- (ins TR:$rd, GPRNoX0:$atm, GPRNoX0:$atn, ixlenimm:$sew,
+ (ins TR:$rd, GPRNoX0:$atm, GPRNoX0:$atn, sew:$sew,
ixlenimm:$twiden)>;
def PseudoSF_VTDISCARD : RISCVVPseudo<(outs), (ins), []>;
}
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive-xsfmm-vset-insert.mir b/llvm/test/CodeGen/RISCV/rvv/sifive-xsfmm-vset-insert.mir
index 389283a40560d..505fb52156b8c 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive-xsfmm-vset-insert.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive-xsfmm-vset-insert.mir
@@ -122,12 +122,12 @@ body: |
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vrm8 = COPY $v16m8
; CHECK-NEXT: [[COPY4:%[0-9]+]]:vrm8 = COPY $v8m8
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 1032 /* e16, w2 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4, 2, implicit $frm, implicit $vl, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4, 2, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2, implicit $frm, implicit $vl, implicit $vtype
; CHECK-NEXT: PseudoRET
%4:gprnox0 = COPY $x12
%3:gprnox0 = COPY $x11
@@ -169,13 +169,13 @@ body: |
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vrm8 = COPY $v16m8
; CHECK-NEXT: [[COPY4:%[0-9]+]]:vrm8 = COPY $v8m8
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 1032 /* e16, w2 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4, 2, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2, implicit $frm, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 1544 /* e16, w4 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4, 3, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4, 3, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4, 4, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 3, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 3, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 4, implicit $frm, implicit $vl, implicit $vtype
; CHECK-NEXT: PseudoRET
%4:gprnox0 = COPY $x12
%3:gprnox0 = COPY $x11
@@ -217,17 +217,17 @@ body: |
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vrm8 = COPY $v16m8
; CHECK-NEXT: [[COPY4:%[0-9]+]]:vrm8 = COPY $v8m8
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 1032 /* e16, w2 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY4]], 7, $noreg, $noreg, $noreg, 4, 2, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY4]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2, implicit $frm, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 1288 /* e16, w2 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F_ALT $t2, [[COPY3]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4, 2, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F_ALT $t2, [[COPY3]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2, implicit $frm, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 1032 /* e16, w2 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY4]], 7, $noreg, $noreg, $noreg, 4, 2, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY4]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2, implicit $frm, implicit $vl, implicit $vtype
; CHECK-NEXT: PseudoRET
%4:gprnox0 = COPY $x12
%3:gprnox0 = COPY $x11
@@ -268,11 +268,11 @@ body: |
; CHECK-NEXT: [[COPY2:%[0-9]+]]:vrm8 = COPY $v8m8
; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 1
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 512 /* e8, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: [[PseudoSF_VTMV_V_T:%[0-9]+]]:vrm8 = PseudoSF_VTMV_V_T [[ADDI]], $noreg, 3, 1, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: [[PseudoSF_VTMV_V_T:%[0-9]+]]:vrm8 = PseudoSF_VTMV_V_T [[ADDI]], $noreg, 3 /* e8 */, 1, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoVSETVLI [[COPY1]], 195 /* e8, m8, ta, ma */, implicit-def $vl, implicit-def $vtype
; CHECK-NEXT: [[PseudoVADD_VV_M8_:%[0-9]+]]:vrm8 = PseudoVADD_VV_M8 $noreg, [[COPY2]], [[PseudoSF_VTMV_V_T]], $noreg, 3 /* e8 */, 0 /* tu, mu */, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 520 /* e16, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: PseudoSF_VSTE16 [[ADDI]], [[COPY]], $noreg, 4, 1, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_VSTE16 [[ADDI]], [[COPY]], $noreg, 4 /* e16 */, 1, implicit $vl, implicit $vtype
; CHECK-NEXT: $v8m8 = COPY [[PseudoVADD_VV_M8_]], implicit $vtype
; CHECK-NEXT: PseudoRET implicit $v8m8
%2:gpr = COPY $x11
@@ -316,11 +316,11 @@ body: |
; CHECK-NEXT: dead $x0 = PseudoVSETVLI [[COPY1]], 195 /* e8, m8, ta, ma */, implicit-def $vl, implicit-def $vtype
; CHECK-NEXT: [[PseudoVADD_VV_M8_:%[0-9]+]]:vrm8 = PseudoVADD_VV_M8 $noreg, [[COPY2]], [[COPY2]], $noreg, 3 /* e8 */, 0 /* tu, mu */, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 512 /* e8, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead [[PseudoSF_VTMV_V_T:%[0-9]+]]:vrm8 = PseudoSF_VTMV_V_T [[ADDI]], $noreg, 3, 1, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead [[PseudoSF_VTMV_V_T:%[0-9]+]]:vrm8 = PseudoSF_VTMV_V_T [[ADDI]], $noreg, 3 /* e8 */, 1, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoVSETVLI [[COPY1]], 195 /* e8, m8, ta, ma */, implicit-def $vl, implicit-def $vtype
; CHECK-NEXT: [[PseudoVADD_VV_M8_1:%[0-9]+]]:vrm8 = PseudoVADD_VV_M8 $noreg, [[PseudoVADD_VV_M8_]], [[PseudoVADD_VV_M8_]], $noreg, 3 /* e8 */, 0 /* tu, mu */, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 520 /* e16, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: PseudoSF_VSTE16 [[ADDI]], [[COPY]], $noreg, 4, 1, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_VSTE16 [[ADDI]], [[COPY]], $noreg, 4 /* e16 */, 1, implicit $vl, implicit $vtype
; CHECK-NEXT: $v8m8 = COPY [[PseudoVADD_VV_M8_1]], implicit $vtype
; CHECK-NEXT: PseudoRET implicit $v8m8
%2:gpr = COPY $x11
@@ -365,11 +365,11 @@ body: |
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gprnox0 = COPY $x12
; CHECK-NEXT: dead [[COPY4:%[0-9]+]]:gprnox0 = COPY $x13
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY2]], 1032 /* e16, w2 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY1]], 4, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY3]], 4, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY]], [[COPY]], 7, $noreg, $noreg, $noreg, 4, 2, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY1]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY3]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY]], [[COPY]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2, implicit $frm, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY3]], 520 /* e16, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: PseudoSF_VSTE16 [[COPY1]], [[COPY2]], $noreg, 4, 1, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_VSTE16 [[COPY1]], [[COPY2]], $noreg, 4 /* e16 */, 1, implicit $vl, implicit $vtype
; CHECK-NEXT: PseudoRET
%0:vrm8 = COPY $v8m8
%1:gprnox0 = COPY $x10
@@ -399,9 +399,9 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnox0 = COPY $x10
; CHECK-NEXT: dead [[PseudoSF_VSETTNTX0_:%[0-9]+]]:gprnox0 = PseudoSF_VSETTNTX0 killed $x0, 520 /* e16, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead [[PseudoSF_VSETTK:%[0-9]+]]:gprnox0 = PseudoSF_VSETTK [[COPY]], 4, 1, implicit-def $vtype, implicit $vtype, implicit $vtype
+ ; CHECK-NEXT: dead [[PseudoSF_VSETTK:%[0-9]+]]:gprnox0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 1, implicit-def $vtype, implicit $vtype, implicit $vtype
; CHECK-NEXT: dead [[PseudoSF_VSETTNTX0_1:%[0-9]+]]:gprnox0 = PseudoSF_VSETTNTX0 $x0, 520 /* e16, w1 */, implicit-def $vl, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: [[PseudoSF_VSETTM:%[0-9]+]]:gprnox0 = PseudoSF_VSETTM [[COPY]], 4, 1, implicit-def $vtype, implicit $vtype, implicit $vtype
+ ; CHECK-NEXT: [[PseudoSF_VSETTM:%[0-9]+]]:gprnox0 = PseudoSF_VSETTM [[COPY]], 4 /* e16 */, 1, implicit-def $vtype, implicit $vtype, implicit $vtype
; CHECK-NEXT: $x10 = COPY [[PseudoSF_VSETTM]]
; CHECK-NEXT: PseudoRET implicit $x10
%0:gprnox0 = COPY $x10
@@ -430,7 +430,7 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnox0 = COPY $x10
; CHECK-NEXT: dead [[PseudoSF_VSETTNTX0_:%[0-9]+]]:gprnox0 = PseudoSF_VSETTNTX0 killed $x0, 520 /* e16, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: [[PseudoSF_VSETTM:%[0-9]+]]:gprnox0 = PseudoSF_VSETTM [[COPY]], 4, 1, implicit-def $vtype, implicit $vtype, implicit $vtype
+ ; CHECK-NEXT: [[PseudoSF_VSETTM:%[0-9]+]]:gprnox0 = PseudoSF_VSETTM [[COPY]], 4 /* e16 */, 1, implicit-def $vtype, implicit $vtype, implicit $vtype
; CHECK-NEXT: $x10 = COPY [[PseudoSF_VSETTM]]
; CHECK-NEXT: PseudoRET implicit $x10
%0:gprnox0 = COPY $x10
@@ -483,7 +483,7 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnox0 = COPY $x10
; CHECK-NEXT: dead [[PseudoSF_VSETTNTX0_:%[0-9]+]]:gprnox0 = PseudoSF_VSETTNTX0 killed $x0, 520 /* e16, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: [[PseudoSF_VSETTK:%[0-9]+]]:gprnox0 = PseudoSF_VSETTK [[COPY]], 4, 1, implicit-def $vtype, implicit $vtype, implicit $vtype
+ ; CHECK-NEXT: [[PseudoSF_VSETTK:%[0-9]+]]:gprnox0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 1, implicit-def $vtype, implicit $vtype, implicit $vtype
; CHECK-NEXT: $x10 = COPY [[PseudoSF_VSETTK]]
; CHECK-NEXT: PseudoRET implicit $x10
%0:gprnox0 = COPY $x10
@@ -513,8 +513,8 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnox0 = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gprnox0 = COPY $x11
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 1536 /* e8, w4 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY]], 3, 3, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_VTZERO_T $t1, $noreg, $noreg, 3, 4, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY]], 3 /* e8 */, 3, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_VTZERO_T $t1, $noreg, $noreg, 3 /* e8 */, 4, implicit $vl, implicit $vtype
; CHECK-NEXT: PseudoRET
%0:gprnox0 = COPY $x10
%1:gprnox0 = COPY $x11
>From be4c6c243ea755828c205403f3063ac94a8c6737 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Tue, 9 Dec 2025 22:46:57 -0800
Subject: [PATCH 2/2] [RISCV] Add OperandType for XSfmm TWiden.
Use the same twiden format for PseudoSF_VSETTM and PseudoSF_VSETTK
as other XSfmm pseudos.
---
.../Target/RISCV/MCTargetDesc/RISCVBaseInfo.h | 4 +-
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp | 2 +-
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 8 +++
llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td | 22 +++---
.../RISCV/rvv/sifive-xsfmm-vset-insert.mir | 70 +++++++++----------
5 files changed, 60 insertions(+), 46 deletions(-)
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
index dbf5cfe6ef463..40b46f503ca53 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
@@ -443,7 +443,9 @@ enum OperandType : unsigned {
OPERAND_VEC_RM,
// Vtype operand for XSfmm extension.
OPERAND_XSFMM_VTYPE,
- OPERAND_LAST_RISCV_IMM = OPERAND_XSFMM_VTYPE,
+ // XSfmm twiden operand.
+ OPERAND_XSFMM_TWIDEN,
+ OPERAND_LAST_RISCV_IMM = OPERAND_XSFMM_TWIDEN,
OPERAND_UIMM20_LUI,
OPERAND_UIMM20_AUIPC,
diff --git a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
index 04065ba1131aa..1a043936383f8 100644
--- a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -1991,7 +1991,7 @@ bool RISCVInsertVSETVLI::insertVSETMTK(MachineBasicBlock &MBB,
.addReg(RISCV::X0, RegState::Define | RegState::Dead)
.addReg(Op.getReg())
.addImm(Log2_32(CurrInfo.getSEW()))
- .addImm(Log2_32(CurrInfo.getTWiden()) + 1);
+ .addImm(CurrInfo.getTWiden());
Changed = true;
Register Reg = Op.getReg();
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index a3bacfbfe5214..ce5a67bd23a9a 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -3045,6 +3045,9 @@ bool RISCVInstrInfo::verifyInstruction(const MachineInstr &MI,
case RISCVOp::OPERAND_XSFMM_VTYPE:
Ok = RISCVVType::isValidXSfmmVType(Imm);
break;
+ case RISCVOp::OPERAND_XSFMM_TWIDEN:
+ Ok = Imm == 1 || Imm == 2 || Imm == 4;
+ break;
}
if (!Ok) {
ErrInfo = "Invalid immediate";
@@ -3775,6 +3778,11 @@ std::string RISCVInstrInfo::createMIROperandComment(
RISCVVType::printXSfmmVType(Imm, OS);
break;
}
+ case RISCVOp::OPERAND_XSFMM_TWIDEN: {
+ unsigned Imm = Op.getImm();
+ OS << "w" << Imm;
+ break;
+ }
case RISCVOp::OPERAND_SEW:
case RISCVOp::OPERAND_SEW_MASK: {
unsigned Log2SEW = Op.getImm();
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td b/llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
index 17553a885a49e..4cb6683fbf9b9 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
@@ -30,6 +30,10 @@ def XSfmmVTypeOp : RISCVOp {
}];
}
+def twiden : RISCVOp {
+ let OperandType = "OPERAND_XSFMM_TWIDEN";
+}
+
let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in
class SFInstSetSingle<dag outs, dag ins, bits<5> rs2, string opcodestr,
string argstr>
@@ -279,7 +283,7 @@ let Uses = [FRM], mayRaiseFPException = true in {
class VPseudoSF_VTileLoad
: RISCVVPseudo<(outs), (ins GPR:$rs2, GPR:$rs1, GPRNoX0:$atn, sew:$sew,
- ixlenimm:$twiden)> {
+ twiden:$twiden)> {
let mayLoad = 1;
let mayStore = 0;
let HasVLOp = 1; // Tn
@@ -290,7 +294,7 @@ class VPseudoSF_VTileLoad
class VPseudoSF_VTileStore
: RISCVVPseudo<(outs), (ins GPR:$rs2, GPR:$rs1, GPRNoX0:$atn, sew:$sew,
- ixlenimm:$twiden)> {
+ twiden:$twiden)> {
let mayLoad = 0;
let mayStore = 1;
let HasVLOp = 1; // Tn
@@ -301,7 +305,7 @@ class VPseudoSF_VTileStore
class VPseudoSF_VTileMove_V_T
: RISCVVPseudo<(outs VRM8:$vd), (ins GPR:$rs1, GPRNoX0:$atn, sew:$sew,
- ixlenimm:$twiden)> {
+ twiden:$twiden)> {
let mayLoad = 0;
let mayStore = 0;
let HasVLOp = 1; // Tn
@@ -312,7 +316,7 @@ class VPseudoSF_VTileMove_V_T
class VPseudoSF_VTileMove_T_V
: RISCVVPseudo<(outs), (ins GPR:$rs1, VRM8:$vs2, GPRNoX0:$atn, sew:$sew,
- ixlenimm:$twiden)> {
+ twiden:$twiden)> {
let mayLoad = 0;
let mayStore = 0;
let HasVLOp = 1; // Tn
@@ -325,7 +329,7 @@ class VPseudoSF_MatMul<RegisterClass mtd_class>
: RISCVVPseudo<(outs),
(ins mtd_class:$rd, VRM8:$vs2, VRM8:$vs1, GPRNoX0:$atm,
GPRNoX0:$atn, GPRNoX0:$atk, sew:$sew,
- ixlenimm:$twiden)> {
+ twiden:$twiden)> {
let mayLoad = 0;
let mayStore = 0;
let HasTmOp = 1;
@@ -340,7 +344,7 @@ class VPseudoSF_MatMul_FRM<RegisterClass mtd_class>
: RISCVVPseudo<(outs),
(ins mtd_class:$rd, VRM8:$vs2, VRM8:$vs1, ixlenimm:$frm,
GPRNoX0:$atm, GPRNoX0:$atn, GPRNoX0:$atk, sew:$sew,
- ixlenimm:$twiden), []> {
+ twiden:$twiden), []> {
let mayLoad = 0;
let mayStore = 0;
let HasTmOp = 1;
@@ -376,12 +380,12 @@ let Defs = [VL, VTYPE] in {
let Defs = [VTYPE], Uses = [VTYPE], HasTWidenOp = 1, HasSEWOp = 1 in {
def PseudoSF_VSETTM
: Pseudo<(outs GPR:$rd),
- (ins GPR:$rs1, sew:$sew, ixlenimm:$twiden), []>,
+ (ins GPR:$rs1, sew:$sew, twiden:$twiden), []>,
PseudoInstExpansion<(SF_VSETTM GPR:$rd, GPR:$rs1)>,
Sched<[WriteVSETVLI, ReadVSETVLI]>;
def PseudoSF_VSETTK
: Pseudo<(outs GPR:$rd),
- (ins GPR:$rs1, sew:$sew, ixlenimm:$twiden), []>,
+ (ins GPR:$rs1, sew:$sew, twiden:$twiden), []>,
PseudoInstExpansion<(SF_VSETTK GPR:$rd, GPR:$rs1)>,
Sched<[WriteVSETVLI, ReadVSETVLI]>;
}
@@ -415,7 +419,7 @@ let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in {
def PseudoSF_VTZERO_T
: RISCVVPseudo<(outs),
(ins TR:$rd, GPRNoX0:$atm, GPRNoX0:$atn, sew:$sew,
- ixlenimm:$twiden)>;
+ twiden:$twiden)>;
def PseudoSF_VTDISCARD : RISCVVPseudo<(outs), (ins), []>;
}
diff --git a/llvm/test/CodeGen/RISCV/rvv/sifive-xsfmm-vset-insert.mir b/llvm/test/CodeGen/RISCV/rvv/sifive-xsfmm-vset-insert.mir
index 505fb52156b8c..a4c638c165973 100644
--- a/llvm/test/CodeGen/RISCV/rvv/sifive-xsfmm-vset-insert.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/sifive-xsfmm-vset-insert.mir
@@ -122,12 +122,12 @@ body: |
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vrm8 = COPY $v16m8
; CHECK-NEXT: [[COPY4:%[0-9]+]]:vrm8 = COPY $v8m8
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 1032 /* e16, w2 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2, implicit $frm, implicit $vl, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2 /* w2 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2 /* w2 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2 /* w2 */, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2 /* w2 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2 /* w2 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2 /* w2 */, implicit $frm, implicit $vl, implicit $vtype
; CHECK-NEXT: PseudoRET
%4:gprnox0 = COPY $x12
%3:gprnox0 = COPY $x11
@@ -169,13 +169,13 @@ body: |
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vrm8 = COPY $v16m8
; CHECK-NEXT: [[COPY4:%[0-9]+]]:vrm8 = COPY $v8m8
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 1032 /* e16, w2 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2 /* w2 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2 /* w2 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2 /* w2 */, implicit $frm, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 1544 /* e16, w4 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 3, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 3, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 4, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 4 /* w4 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 4 /* w4 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 4 /* w4 */, implicit $frm, implicit $vl, implicit $vtype
; CHECK-NEXT: PseudoRET
%4:gprnox0 = COPY $x12
%3:gprnox0 = COPY $x11
@@ -217,17 +217,17 @@ body: |
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vrm8 = COPY $v16m8
; CHECK-NEXT: [[COPY4:%[0-9]+]]:vrm8 = COPY $v8m8
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 1032 /* e16, w2 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY4]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2 /* w2 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2 /* w2 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY4]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2 /* w2 */, implicit $frm, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 1288 /* e16, w2 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F_ALT $t2, [[COPY3]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2 /* w2 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2 /* w2 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F_ALT $t2, [[COPY3]], [[COPY3]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2 /* w2 */, implicit $frm, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 1032 /* e16, w2 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY4]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY2]], 4 /* e16 */, 2 /* w2 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 2 /* w2 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY4]], [[COPY4]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2 /* w2 */, implicit $frm, implicit $vl, implicit $vtype
; CHECK-NEXT: PseudoRET
%4:gprnox0 = COPY $x12
%3:gprnox0 = COPY $x11
@@ -268,11 +268,11 @@ body: |
; CHECK-NEXT: [[COPY2:%[0-9]+]]:vrm8 = COPY $v8m8
; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 1
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 512 /* e8, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: [[PseudoSF_VTMV_V_T:%[0-9]+]]:vrm8 = PseudoSF_VTMV_V_T [[ADDI]], $noreg, 3 /* e8 */, 1, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: [[PseudoSF_VTMV_V_T:%[0-9]+]]:vrm8 = PseudoSF_VTMV_V_T [[ADDI]], $noreg, 3 /* e8 */, 1 /* w1 */, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoVSETVLI [[COPY1]], 195 /* e8, m8, ta, ma */, implicit-def $vl, implicit-def $vtype
; CHECK-NEXT: [[PseudoVADD_VV_M8_:%[0-9]+]]:vrm8 = PseudoVADD_VV_M8 $noreg, [[COPY2]], [[PseudoSF_VTMV_V_T]], $noreg, 3 /* e8 */, 0 /* tu, mu */, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 520 /* e16, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: PseudoSF_VSTE16 [[ADDI]], [[COPY]], $noreg, 4 /* e16 */, 1, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_VSTE16 [[ADDI]], [[COPY]], $noreg, 4 /* e16 */, 1 /* w1 */, implicit $vl, implicit $vtype
; CHECK-NEXT: $v8m8 = COPY [[PseudoVADD_VV_M8_]], implicit $vtype
; CHECK-NEXT: PseudoRET implicit $v8m8
%2:gpr = COPY $x11
@@ -316,11 +316,11 @@ body: |
; CHECK-NEXT: dead $x0 = PseudoVSETVLI [[COPY1]], 195 /* e8, m8, ta, ma */, implicit-def $vl, implicit-def $vtype
; CHECK-NEXT: [[PseudoVADD_VV_M8_:%[0-9]+]]:vrm8 = PseudoVADD_VV_M8 $noreg, [[COPY2]], [[COPY2]], $noreg, 3 /* e8 */, 0 /* tu, mu */, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 512 /* e8, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead [[PseudoSF_VTMV_V_T:%[0-9]+]]:vrm8 = PseudoSF_VTMV_V_T [[ADDI]], $noreg, 3 /* e8 */, 1, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead [[PseudoSF_VTMV_V_T:%[0-9]+]]:vrm8 = PseudoSF_VTMV_V_T [[ADDI]], $noreg, 3 /* e8 */, 1 /* w1 */, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoVSETVLI [[COPY1]], 195 /* e8, m8, ta, ma */, implicit-def $vl, implicit-def $vtype
; CHECK-NEXT: [[PseudoVADD_VV_M8_1:%[0-9]+]]:vrm8 = PseudoVADD_VV_M8 $noreg, [[PseudoVADD_VV_M8_]], [[PseudoVADD_VV_M8_]], $noreg, 3 /* e8 */, 0 /* tu, mu */, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 520 /* e16, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: PseudoSF_VSTE16 [[ADDI]], [[COPY]], $noreg, 4 /* e16 */, 1, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_VSTE16 [[ADDI]], [[COPY]], $noreg, 4 /* e16 */, 1 /* w1 */, implicit $vl, implicit $vtype
; CHECK-NEXT: $v8m8 = COPY [[PseudoVADD_VV_M8_1]], implicit $vtype
; CHECK-NEXT: PseudoRET implicit $v8m8
%2:gpr = COPY $x11
@@ -365,11 +365,11 @@ body: |
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gprnox0 = COPY $x12
; CHECK-NEXT: dead [[COPY4:%[0-9]+]]:gprnox0 = COPY $x13
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY2]], 1032 /* e16, w2 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY1]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY3]], 4 /* e16 */, 2, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY]], [[COPY]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2, implicit $frm, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY1]], 4 /* e16 */, 2 /* w2 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTK [[COPY3]], 4 /* e16 */, 2 /* w2 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_MM_F_F $t2, [[COPY]], [[COPY]], 7, $noreg, $noreg, $noreg, 4 /* e16 */, 2 /* w2 */, implicit $frm, implicit $vl, implicit $vtype
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY3]], 520 /* e16, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: PseudoSF_VSTE16 [[COPY1]], [[COPY2]], $noreg, 4 /* e16 */, 1, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_VSTE16 [[COPY1]], [[COPY2]], $noreg, 4 /* e16 */, 1 /* w1 */, implicit $vl, implicit $vtype
; CHECK-NEXT: PseudoRET
%0:vrm8 = COPY $v8m8
%1:gprnox0 = COPY $x10
@@ -399,9 +399,9 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnox0 = COPY $x10
; CHECK-NEXT: dead [[PseudoSF_VSETTNTX0_:%[0-9]+]]:gprnox0 = PseudoSF_VSETTNTX0 killed $x0, 520 /* e16, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead [[PseudoSF_VSETTK:%[0-9]+]]:gprnox0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 1, implicit-def $vtype, implicit $vtype, implicit $vtype
+ ; CHECK-NEXT: dead [[PseudoSF_VSETTK:%[0-9]+]]:gprnox0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 1 /* w1 */, implicit-def $vtype, implicit $vtype, implicit $vtype
; CHECK-NEXT: dead [[PseudoSF_VSETTNTX0_1:%[0-9]+]]:gprnox0 = PseudoSF_VSETTNTX0 $x0, 520 /* e16, w1 */, implicit-def $vl, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: [[PseudoSF_VSETTM:%[0-9]+]]:gprnox0 = PseudoSF_VSETTM [[COPY]], 4 /* e16 */, 1, implicit-def $vtype, implicit $vtype, implicit $vtype
+ ; CHECK-NEXT: [[PseudoSF_VSETTM:%[0-9]+]]:gprnox0 = PseudoSF_VSETTM [[COPY]], 4 /* e16 */, 1 /* w1 */, implicit-def $vtype, implicit $vtype, implicit $vtype
; CHECK-NEXT: $x10 = COPY [[PseudoSF_VSETTM]]
; CHECK-NEXT: PseudoRET implicit $x10
%0:gprnox0 = COPY $x10
@@ -430,7 +430,7 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnox0 = COPY $x10
; CHECK-NEXT: dead [[PseudoSF_VSETTNTX0_:%[0-9]+]]:gprnox0 = PseudoSF_VSETTNTX0 killed $x0, 520 /* e16, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: [[PseudoSF_VSETTM:%[0-9]+]]:gprnox0 = PseudoSF_VSETTM [[COPY]], 4 /* e16 */, 1, implicit-def $vtype, implicit $vtype, implicit $vtype
+ ; CHECK-NEXT: [[PseudoSF_VSETTM:%[0-9]+]]:gprnox0 = PseudoSF_VSETTM [[COPY]], 4 /* e16 */, 1 /* w1 */, implicit-def $vtype, implicit $vtype, implicit $vtype
; CHECK-NEXT: $x10 = COPY [[PseudoSF_VSETTM]]
; CHECK-NEXT: PseudoRET implicit $x10
%0:gprnox0 = COPY $x10
@@ -483,7 +483,7 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnox0 = COPY $x10
; CHECK-NEXT: dead [[PseudoSF_VSETTNTX0_:%[0-9]+]]:gprnox0 = PseudoSF_VSETTNTX0 killed $x0, 520 /* e16, w1 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: [[PseudoSF_VSETTK:%[0-9]+]]:gprnox0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 1, implicit-def $vtype, implicit $vtype, implicit $vtype
+ ; CHECK-NEXT: [[PseudoSF_VSETTK:%[0-9]+]]:gprnox0 = PseudoSF_VSETTK [[COPY]], 4 /* e16 */, 1 /* w1 */, implicit-def $vtype, implicit $vtype, implicit $vtype
; CHECK-NEXT: $x10 = COPY [[PseudoSF_VSETTK]]
; CHECK-NEXT: PseudoRET implicit $x10
%0:gprnox0 = COPY $x10
@@ -513,8 +513,8 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnox0 = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gprnox0 = COPY $x11
; CHECK-NEXT: dead $x0 = PseudoSF_VSETTNT [[COPY1]], 1536 /* e8, w4 */, implicit-def $vl, implicit-def $vtype
- ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY]], 3 /* e8 */, 3, implicit-def $vtype, implicit $vtype
- ; CHECK-NEXT: PseudoSF_VTZERO_T $t1, $noreg, $noreg, 3 /* e8 */, 4, implicit $vl, implicit $vtype
+ ; CHECK-NEXT: dead $x0 = PseudoSF_VSETTM [[COPY]], 3 /* e8 */, 4 /* w4 */, implicit-def $vtype, implicit $vtype
+ ; CHECK-NEXT: PseudoSF_VTZERO_T $t1, $noreg, $noreg, 3 /* e8 */, 4 /* w4 */, implicit $vl, implicit $vtype
; CHECK-NEXT: PseudoRET
%0:gprnox0 = COPY $x10
%1:gprnox0 = COPY $x11
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