[llvm] [AArch64][GlobalISel] Fix incorrect codegen for FPR16/FPR8 to GPR copies (PR #171499)
Sam Schweigel via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 9 21:30:38 PST 2025
xal-0 wrote:
I would guess this could be handled more easily in legalization, or in `AArch64InstructionSelector::select`, which already has some special handling for stronger-than-monotonic stores. `copyPhysReg` feels like the wrong place to me.
This change to legalization fixes the bug and handles a pair of TODOs:
```diff
diff --git i/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp w/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 44a148940ec9..1761b356b655 100644
--- i/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ w/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -568,6 +568,10 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
return Query.Types[0] == s128 &&
Query.MMODescrs[0].Ordering != AtomicOrdering::NotAtomic;
})
+ .widenScalarIf(
+ all(scalarNarrowerThan(0, 32),
+ atomicOrderingAtLeastOrStrongerThan(0, AtomicOrdering::Release)),
+ changeTo(0, s32))
.legalForTypesWithMemDesc(
{{s8, p0, s8, 8}, {s16, p0, s8, 8}, // truncstorei8 from s16
{s32, p0, s8, 8}, // truncstorei8 from s32
diff --git i/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-rcpc_immo.ll w/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-rcpc_immo.ll
index c80b18d17888..8bf5e41318b8 100644
--- i/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-rcpc_immo.ll
+++ w/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-rcpc_immo.ll
@@ -357,12 +357,10 @@ define void @store_atomic_i128_unaligned_seq_cst(i128 %value, ptr %ptr) {
ret void
}
-; TODO: missed opportunity to emit a stlurb w/ GISel
define void @store_atomic_i8_from_gep() {
; GISEL-LABEL: store_atomic_i8_from_gep:
; GISEL: bl init
-; GISEL: add x9, x8, #1
-; GISEL: stlrb w8, [x9]
+; GISEL: stlurb w8, [x9, #1]
;
; SDAG-LABEL: store_atomic_i8_from_gep:
; SDAG: bl init
@@ -378,8 +376,7 @@ define void @store_atomic_i8_from_gep() {
define void @store_atomic_i16_from_gep() {
; GISEL-LABEL: store_atomic_i16_from_gep:
; GISEL: bl init
-; GISEL: add x9, x8, #2
-; GISEL: stlrh w8, [x9]
+; GISEL: stlurh w8, [x9, #2]
;
; SDAG-LABEL: store_atomic_i16_from_gep:
; SDAG: bl init
```
https://github.com/llvm/llvm-project/pull/171499
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