[llvm] [RISCV] Combine (addi (addi)) and add post riscv-opt-w-instrs machine-combiner (PR #171165)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 9 09:07:47 PST 2025


topperc wrote:

> > Have you looked at the impact across other workloads?
> 
> No, I only looked at [llvm-codegen-benchmark](https://github.com/dtcxzyw/llvm-codegen-benchmark). I'd appreciate help in checking against other benchmarks.
> 
> > I'm bit concerned about adding another run of a pass if this isn't a common issue.
> 
> How about we remove the pre-`opt-w-instrs` `machine-combiner`? I added a commit doing that. While the emitted code is different, it doesn't look worse (also checked with llvm-codegen-benchmark). I commented two tests that need further inspection.

Would that undo the benefit what we were trying to do with 3a2c8f7af8b38dd17649a42fc1f291d47f6e175d?

https://github.com/llvm/llvm-project/pull/171165


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