[llvm] [AArch64] Optimize more floating-point round+convert combinations into fcvt instructions (PR #170018)

[via llvm-commits]

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@@ -434,6 +434,112 @@ entry:
   ret i64 %i
 }
 
+; Round to nearest, ties to even (fcvtns).
+
+define i32 @testnswh(half %a) {
+; CHECK-CVT-LABEL: testnswh:
+; CHECK-CVT:       // %bb.0: // %entry
+; CHECK-CVT-NEXT:    fcvt s0, h0
+; CHECK-CVT-NEXT:    frintn s0, s0
+; CHECK-CVT-NEXT:    fcvt h0, s0
+; CHECK-CVT-NEXT:    fcvt s0, h0
+; CHECK-CVT-NEXT:    fcvtzs w0, s0
+; CHECK-CVT-NEXT:    ret
+;
+; CHECK-FP16-LABEL: testnswh:
+; CHECK-FP16:       // %bb.0: // %entry
+; CHECK-FP16-NEXT:    fcvtns w0, h0
+; CHECK-FP16-NEXT:    ret
+entry:
+  %r = call half @llvm.roundeven.f16(half %a) nounwind readnone
+  %i = call i32 @llvm.fptosi.sat.i32.f16(half %r)
+  ret i32 %i
+}
+
+define i64 @testnsxh(half %a) {
+; CHECK-CVT-LABEL: testnsxh:
+; CHECK-CVT:       // %bb.0: // %entry
+; CHECK-CVT-NEXT:    fcvt s0, h0
+; CHECK-CVT-NEXT:    frintn s0, s0
+; CHECK-CVT-NEXT:    fcvt h0, s0
+; CHECK-CVT-NEXT:    fcvt s0, h0
+; CHECK-CVT-NEXT:    fcvtzs x0, s0
+; CHECK-CVT-NEXT:    ret
+;
+; CHECK-FP16-LABEL: testnsxh:
+; CHECK-FP16:       // %bb.0: // %entry
+; CHECK-FP16-NEXT:    fcvtns x0, h0
+; CHECK-FP16-NEXT:    ret
+entry:
+  %r = call half @llvm.roundeven.f16(half %a) nounwind readnone
+  %i = call i64 @llvm.fptosi.sat.i64.f16(half %r)
+  ret i64 %i
+}
+
+define i32 @testnsws(float %a) {
+; CHECK-LABEL: testnsws:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT:    .cfi_def_cfa_offset 16
+; CHECK-NEXT:    .cfi_offset w30, -16
+; CHECK-NEXT:    bl roundevenf
+; CHECK-NEXT:    fcvtzs w0, s0
+; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT:    ret
+entry:
+  %r = call float @roundevenf(float %a) nounwind readnone
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Lukacma wrote:

So you added patterns for roundeven nodes, but you are not testing them here. I understand that they should be generated from this call, but they aren't so these tests are not really testing the patterns now. Maybe you should add tests with the nodes directly as it is done for f16 cases to tests those patterns until the fix is ready. 

https://github.com/llvm/llvm-project/pull/170018