[llvm] [ARM] computeKnownBitsForTargetNode for VMOVIMM/VMVNIMM Fixes #149276 (PR #171434)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp -- llvm/lib/Target/ARM/ARMISelLowering.cpp llvm/lib/Target/ARM/ARMISelLowering.h llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp --diff_from_common_commit
``````````

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``````````diff
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index d5d6cd132..e75a88804 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -19868,25 +19868,24 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
     unsigned Encoded = Op.getConstantOperandVal(0);
     unsigned DecEltBits = 0;
     uint64_t DecodedVal = ARM_AM::decodeVMOVModImm(Encoded, DecEltBits);
-    
+
     unsigned EltBits = Op.getScalarValueSizeInBits();
     if (EltBits != DecEltBits)
       break;
-    
+
     // Create APInt with the decoded value
     APInt Imm(DecEltBits, DecodedVal);
-    
+
     // For VMVNIMM, apply bitwise NOT
     if (Op.getOpcode() == ARMISD::VMVNIMM)
       Imm.flipAllBits();
-    
+
     Known = KnownBits::makeConstant(Imm);
     break;
   }
   }
 }
 
-
 bool ARMTargetLowering::isTargetCanonicalConstantNode(SDValue Op) const {
   // VMOVIMM/VMVNIMM are the canonical form for ARM vector constants.
   // Prevent folding them into generic constants to avoid infinite loops
diff --git a/llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp b/llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
index c7ce0e12b..764369da9 100644
--- a/llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
+++ b/llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
@@ -194,7 +194,6 @@ TEST_F(ARMSelectionDAGTest, computeKnownBits_VBICIMM_cmode2_lhs_ones) {
   EXPECT_EQ(Known.Zero, APInt(32, 0x0000AA00));
 }
 
-
 /// VMOVIMM: Move immediate to vector register.
 /// cmode=0x0 puts imm8 in byte0 => per-lane constant = 0x000000AA.
 /// All bits are known since this creates a pure constant.

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https://github.com/llvm/llvm-project/pull/171434