[llvm] [AMDGPU] Add register pressure guard on LLVM-IR level to prevent harmful optimizations (PR #171267)

[Carl Ritson via llvm-commits]

https://github.com/perlfu commented:

Needs tests.

At a quick look algorithms could do with more comments explaining operation.
Gut feeling is that some parts of this already exist elsewhere in backend?

https://github.com/llvm/llvm-project/pull/171267