[llvm] [TableGen] Handle RegClassByHwMode in AsmWriter (PR #171264)

Alexander Richardson via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 8 22:06:44 PST 2025


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@@ -0,0 +1,48 @@
+// RUN: llvm-tblgen -gen-asm-writer  -I %S -I %p/../../include %s -o - | FileCheck %s
+
+include "Common/RegClassByHwModeCommon.td"
+
+def IsPtrY : Predicate<"Subtarget->isPtrY()">;
+defvar PtrX = DefaultMode;
+def PtrY : HwMode<[IsPtrY]>;
+
+// Define more restrictive subset classes to check that those are handled.
+def EvenXRegs : RegisterClass<"MyTarget", [i64], 64, (add X0, X2, X4, X6)>;
+def EvenYRegs : RegisterClass<"MyTarget", [i64], 64, (add Y0, Y2, Y4, Y6)>;
+def PtrRC : RegClassByHwMode<[PtrX, PtrY], [XRegs, YRegs]>;
+def EvenPtrRC : RegClassByHwMode<[PtrX, PtrY], [EvenXRegs, EvenYRegs]>;
+
+def TEST_XREG : TestInstruction {
+  let OutOperandList = (outs XRegs:$dst);
+  let InOperandList = (ins XRegs:$src);
+  let AsmString = "t_x $dst, $src";
+  let opcode = 0;
+}
+def TEST_PTR : TestInstruction {
+  let OutOperandList = (outs PtrRC:$dst);
+  let InOperandList = (ins PtrRC:$src);
+  let AsmString = "t_ptr $dst, $src";
+  let opcode = 0;
+}
+
+def MY_T_X : InstAlias<"t_x $src", (TEST_XREG X0, XRegs:$src)>;
+def MY_T_X_EVEN : InstAlias<"t_x.even $src", (TEST_XREG EvenXRegs:$dst, EvenXRegs:$src)>;
+
+// TODO: Can't use a fixed register for this instruction, would need RegisterByHwMode.
----------------
arichardson wrote:

I have a WIP change adding RegisterByHwMode that should be ready for upload in the coming days.

https://github.com/llvm/llvm-project/pull/171264


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