[llvm] [llvm] Make use of `llvm::reverse_conditionally()` in a few places (NFCI) (PR #171150)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-mc

Author: Benjamin Maxwell (MacDue)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/171150.diff


3 Files Affected:

- (modified) llvm/lib/CodeGen/PrologEpilogInserter.cpp (+10-21) 
- (modified) llvm/lib/CodeGen/RegisterClassInfo.cpp (+1-6) 
- (modified) llvm/lib/MC/MCWin64EH.cpp (+5-12) 


``````````diff
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
index 510faa3f56f3e..44cfaef944da7 100644
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -911,29 +911,18 @@ void PEIImpl::calculateFrameObjectOffsets(MachineFunction &MF) {
   Align MaxAlign = MFI.getMaxAlign();
   // First assign frame offsets to stack objects that are used to spill
   // callee saved registers.
-  if (StackGrowsDown) {
-    for (int FI = MFI.getObjectIndexBegin(); FI < MFI.getObjectIndexEnd();
-         FI++) {
-      // Only allocate objects on the default stack.
-      if (!MFI.isCalleeSavedObjectIndex(FI) ||
-          MFI.getStackID(FI) != TargetStackID::Default)
-        continue;
-      // TODO: should we be using MFI.isDeadObjectIndex(FI) here?
-      AdjustStackOffset(MFI, FI, StackGrowsDown, Offset, MaxAlign);
-    }
-  } else {
-    for (int FI = MFI.getObjectIndexEnd() - 1; FI >= MFI.getObjectIndexBegin();
-         FI--) {
-      // Only allocate objects on the default stack.
-      if (!MFI.isCalleeSavedObjectIndex(FI) ||
-          MFI.getStackID(FI) != TargetStackID::Default)
-        continue;
+  auto AllFIs = seq(MFI.getObjectIndexBegin(), MFI.getObjectIndexEnd());
+  for (int FI : reverse_conditionally(AllFIs, /*Reverse=*/!StackGrowsDown)) {
+    // Only allocate objects on the default stack.
+    if (!MFI.isCalleeSavedObjectIndex(FI) ||
+        MFI.getStackID(FI) != TargetStackID::Default)
+      continue;
 
-      if (MFI.isDeadObjectIndex(FI))
-        continue;
+    // TODO: should this just be if (MFI.isDeadObjectIndex(FI))
+    if (!StackGrowsDown && MFI.isDeadObjectIndex(FI))
+      continue;
 
-      AdjustStackOffset(MFI, FI, StackGrowsDown, Offset, MaxAlign);
-    }
+    AdjustStackOffset(MFI, FI, StackGrowsDown, Offset, MaxAlign);
   }
 
   assert(MaxAlign == MFI.getMaxAlign() &&
diff --git a/llvm/lib/CodeGen/RegisterClassInfo.cpp b/llvm/lib/CodeGen/RegisterClassInfo.cpp
index bbeb7adae825c..e6fd10a38da7c 100644
--- a/llvm/lib/CodeGen/RegisterClassInfo.cpp
+++ b/llvm/lib/CodeGen/RegisterClassInfo.cpp
@@ -145,12 +145,7 @@ void RegisterClassInfo::compute(const TargetRegisterClass *RC) const {
   // FIXME: Once targets reserve registers instead of removing them from the
   // allocation order, we can simply use begin/end here.
   ArrayRef<MCPhysReg> RawOrder = RC->getRawAllocationOrder(*MF, Reverse);
-  std::vector<MCPhysReg> ReverseOrder;
-  if (Reverse) {
-    llvm::append_range(ReverseOrder, reverse(RawOrder));
-    RawOrder = ArrayRef<MCPhysReg>(ReverseOrder);
-  }
-  for (unsigned PhysReg : RawOrder) {
+  for (unsigned PhysReg : reverse_conditionally(RawOrder, Reverse)) {
     // Remove reserved registers from the allocation order.
     if (Reserved.test(PhysReg))
       continue;
diff --git a/llvm/lib/MC/MCWin64EH.cpp b/llvm/lib/MC/MCWin64EH.cpp
index 6835ba73ffab8..7a4b07991c674 100644
--- a/llvm/lib/MC/MCWin64EH.cpp
+++ b/llvm/lib/MC/MCWin64EH.cpp
@@ -887,7 +887,11 @@ static void simplifyARM64Opcodes(std::vector<WinEH::Instruction> &Instructions,
   unsigned PrevOffset = -1;
   unsigned PrevRegister = -1;
 
-  auto VisitInstruction = [&](WinEH::Instruction &Inst) {
+  // Iterate over instructions in a forward order (for prologues),
+  // backwards for epilogues (i.e. always reverse compared to how the
+  // opcodes are stored).
+  for (WinEH::Instruction &Inst :
+       llvm::reverse_conditionally(Instructions, Reverse)) {
     // Convert 2-byte opcodes into equivalent 1-byte ones.
     if (Inst.Operation == Win64EH::UOP_SaveRegP && Inst.Register == 29) {
       Inst.Operation = Win64EH::UOP_SaveFPLR;
@@ -930,17 +934,6 @@ static void simplifyARM64Opcodes(std::vector<WinEH::Instruction> &Instructions,
       PrevRegister = -1;
       PrevOffset = -1;
     }
-  };
-
-  // Iterate over instructions in a forward order (for prologues),
-  // backwards for epilogues (i.e. always reverse compared to how the
-  // opcodes are stored).
-  if (Reverse) {
-    for (auto It = Instructions.rbegin(); It != Instructions.rend(); It++)
-      VisitInstruction(*It);
-  } else {
-    for (WinEH::Instruction &Inst : Instructions)
-      VisitInstruction(Inst);
   }
 }
 

``````````

</details>


https://github.com/llvm/llvm-project/pull/171150