[llvm] [AArch64] Mark Armv8.4-a LDAPUR* instructions as mayLoad (PR #171142)

Cullen Rhodes via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 8 07:24:56 PST 2025


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@@ -14,11 +14,11 @@
 # CHECK-NEXT:  2      1     0.50    *                   ldapur	x20, [x13]
 # CHECK-NEXT:  2      1     0.50    *                   ldapurb	w13, [x17]
 # CHECK-NEXT:  2      1     0.50    *                   ldapurh	w3, [x22]
-# CHECK-NEXT:  2      1     0.50                  U     ldapursb	w7, [x8]
-# CHECK-NEXT:  2      1     0.50                  U     ldapursb	x29, [x7]
-# CHECK-NEXT:  2      1     0.50                  U     ldapursh	w17, [x19]
-# CHECK-NEXT:  2      1     0.50                  U     ldapursh	x3, [x3]
-# CHECK-NEXT:  2      1     0.50                  U     ldapursw	x3, [x18]
+# CHECK-NEXT:  2      1     0.50    *             U     ldapursb	w7, [x8]
+# CHECK-NEXT:  2      1     0.50    *             U     ldapursb	x29, [x7]
+# CHECK-NEXT:  2      1     0.50    *             U     ldapursh	w17, [x19]
+# CHECK-NEXT:  2      1     0.50    *             U     ldapursh	x3, [x3]
+# CHECK-NEXT:  2      1     0.50    *             U     ldapursw	x3, [x18]
----------------
c-rhodes wrote:

I'm not familiar with the semantics of these instructions, but from a quick glance at https://developer.arm.com/documentation/102336/0100/Load-Acquire-and-Store-Release-instructions it looks like they have implicit barrier semantics, so while I can't give a definitive answer I would err more towards them having side-effects than not. `dmb` instructions do, and these have less constrained but similar semantics it seems.

https://github.com/llvm/llvm-project/pull/171142


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