[llvm] [LTO][Veclib] Fix vector library handling with LTO (PR #170638)

Usha Gupta via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 8 06:54:32 PST 2025


https://github.com/usha1830 updated https://github.com/llvm/llvm-project/pull/170638

>From 015f1a3d242bcc1d07adcdcbed8cfb0089042bf7 Mon Sep 17 00:00:00 2001
From: Usha Gupta <usha.gupta at arm.com>
Date: Thu, 4 Dec 2025 09:56:50 +0000
Subject: [PATCH 1/4] Fix vector library handling with LTO

---
 llvm/lib/LTO/LTOBackend.cpp           | 4 ++--
 llvm/lib/LTO/ThinLTOCodeGenerator.cpp | 2 +-
 llvm/lib/LTO/UpdateCompilerUsed.cpp   | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/LTO/LTOBackend.cpp b/llvm/lib/LTO/LTOBackend.cpp
index 93118becedbac..705bdbae4acf7 100644
--- a/llvm/lib/LTO/LTOBackend.cpp
+++ b/llvm/lib/LTO/LTOBackend.cpp
@@ -278,7 +278,7 @@ static void runNewPMPasses(const Config &Conf, Module &Mod, TargetMachine *TM,
   RegisterPassPlugins(Conf.PassPlugins, PB);
 
   std::unique_ptr<TargetLibraryInfoImpl> TLII(
-      new TargetLibraryInfoImpl(TM->getTargetTriple()));
+      new TargetLibraryInfoImpl(TM->getTargetTriple(), TM->Options.VecLib));
   if (Conf.Freestanding)
     TLII->disableAllFunctions();
   FAM.registerPass([&] { return TargetLibraryAnalysis(*TLII); });
@@ -444,7 +444,7 @@ static void codegen(const Config &Conf, TargetMachine *TM,
   // keep the pointer and may use it until their destruction. See #138194.
   {
     legacy::PassManager CodeGenPasses;
-    TargetLibraryInfoImpl TLII(Mod.getTargetTriple());
+    TargetLibraryInfoImpl TLII(Mod.getTargetTriple(), TM->Options.VecLib);
     CodeGenPasses.add(new TargetLibraryInfoWrapperPass(TLII));
     // No need to make index available if the module is empty.
     // In theory these passes should not use the index for an empty
diff --git a/llvm/lib/LTO/ThinLTOCodeGenerator.cpp b/llvm/lib/LTO/ThinLTOCodeGenerator.cpp
index ff94c54ab3e6e..ed26c931d0629 100644
--- a/llvm/lib/LTO/ThinLTOCodeGenerator.cpp
+++ b/llvm/lib/LTO/ThinLTOCodeGenerator.cpp
@@ -249,7 +249,7 @@ static void optimizeModule(Module &TheModule, TargetMachine &TM,
   PassBuilder PB(&TM, PTO, PGOOpt, &PIC);
 
   std::unique_ptr<TargetLibraryInfoImpl> TLII(
-      new TargetLibraryInfoImpl(TM.getTargetTriple()));
+      new TargetLibraryInfoImpl(TM.getTargetTriple(), TM.Options.VecLib));
   if (Freestanding)
     TLII->disableAllFunctions();
   FAM.registerPass([&] { return TargetLibraryAnalysis(*TLII); });
diff --git a/llvm/lib/LTO/UpdateCompilerUsed.cpp b/llvm/lib/LTO/UpdateCompilerUsed.cpp
index 1889c2b762ff7..f79a3744afad3 100644
--- a/llvm/lib/LTO/UpdateCompilerUsed.cpp
+++ b/llvm/lib/LTO/UpdateCompilerUsed.cpp
@@ -57,7 +57,7 @@ class PreserveLibCallsAndAsmUsed {
   // same names are added to llvm.compiler.used to prevent them from being
   // deleted by optimizations.
   void initializeLibCalls(const Module &TheModule) {
-    TargetLibraryInfoImpl TLII(TM.getTargetTriple());
+    TargetLibraryInfoImpl TLII(TM.getTargetTriple(), TM.Options.VecLib);
     TargetLibraryInfo TLI(TLII);
 
     // TargetLibraryInfo has info on C runtime library calls on the current

>From 997d9c827e22d5cb2e6ccc2bcd2846743ea8c8b9 Mon Sep 17 00:00:00 2001
From: Usha Gupta <usha.gupta at arm.com>
Date: Mon, 8 Dec 2025 12:20:53 +0000
Subject: [PATCH 2/4] Added LTO tests

---
 llvm/test/LTO/AArch64/frem-scalable-veclib.ll | 20 ++++++++++++++
 llvm/test/LTO/AArch64/veclib-armpl-lto.ll     | 25 +++++++++++++++++
 llvm/test/LTO/AArch64/veclib-armpl-lto2.ll    | 27 +++++++++++++++++++
 3 files changed, 72 insertions(+)
 create mode 100644 llvm/test/LTO/AArch64/frem-scalable-veclib.ll
 create mode 100644 llvm/test/LTO/AArch64/veclib-armpl-lto.ll
 create mode 100644 llvm/test/LTO/AArch64/veclib-armpl-lto2.ll

diff --git a/llvm/test/LTO/AArch64/frem-scalable-veclib.ll b/llvm/test/LTO/AArch64/frem-scalable-veclib.ll
new file mode 100644
index 0000000000000..445aef9bd4ffc
--- /dev/null
+++ b/llvm/test/LTO/AArch64/frem-scalable-veclib.ll
@@ -0,0 +1,20 @@
+; REQUIRES: aarch64-registered-target
+; RUN: opt -module-summary %s -o %t.bc
+; RUN: llvm-lto2 run %t.bc -o %t.o -save-temps \
+; RUN:   -r %t.bc,compute,px \
+; RUN:   -mcpu=neoverse-v1 -O3 \
+; RUN:   -vector-library=ArmPL
+; RUN: llvm-nm %t.o.1 | FileCheck %s
+
+; This test verifies that the VecLib propagation in LTO prevents a crash
+; when compiling scalable vector frem operations.
+
+; CHECK: compute
+
+target triple = "aarch64-unknown-linux-gnu"
+
+define fastcc <vscale x 2 x double> @compute(<vscale x 2 x double> %0) {
+entry:
+  %1 = frem <vscale x 2 x double> %0, zeroinitializer
+  ret <vscale x 2 x double> %1
+}
diff --git a/llvm/test/LTO/AArch64/veclib-armpl-lto.ll b/llvm/test/LTO/AArch64/veclib-armpl-lto.ll
new file mode 100644
index 0000000000000..4df1a30e4f114
--- /dev/null
+++ b/llvm/test/LTO/AArch64/veclib-armpl-lto.ll
@@ -0,0 +1,25 @@
+; REQUIRES: aarch64-registered-target
+; RUN: llvm-as %s -o %t.bc
+; RUN: llvm-lto -exported-symbol=compute -exported-symbol=armpl_vsinq_f64 -o %t.o %t.bc
+; RUN: llvm-nm %t.o | FileCheck %s
+
+; This test ensures that ArmPL vector library functions are preserved through
+; the old LTO API (llvm-lto). TargetLibraryInfoImpl in LTO backend passes 
+; receive the VecLib parameter from TargetMachine Options.
+
+; CHECK: armpl_vsinq_f64
+; CHECK: compute
+
+target triple = "aarch64-unknown-linux-gnu"
+
+ at llvm.compiler.used = appending global [1 x ptr] [ptr @armpl_vsinq_f64], section "llvm.metadata"
+
+declare aarch64_vector_pcs <2 x double> @armpl_vsinq_f64(<2 x double>)
+
+define void @compute(ptr %out, ptr %in) {
+entry:
+  %v = load <2 x double>, ptr %in, align 16
+  %result = call aarch64_vector_pcs <2 x double> @armpl_vsinq_f64(<2 x double> %v)
+  store <2 x double> %result, ptr %out, align 16
+  ret void
+}
diff --git a/llvm/test/LTO/AArch64/veclib-armpl-lto2.ll b/llvm/test/LTO/AArch64/veclib-armpl-lto2.ll
new file mode 100644
index 0000000000000..63594d0019a42
--- /dev/null
+++ b/llvm/test/LTO/AArch64/veclib-armpl-lto2.ll
@@ -0,0 +1,27 @@
+; REQUIRES: aarch64-registered-target
+; RUN: opt -module-summary %s -o %t.bc
+; RUN: llvm-lto2 run -save-temps -o %t.o %t.bc \
+; RUN:   -r=%t.bc,compute,px \
+; RUN:   -r=%t.bc,armpl_vsinq_f64
+; RUN: llvm-dis %t.o.1.5.precodegen.bc -o - | FileCheck %s
+
+; This test ensures that ArmPL vector library functions are preserved through
+; the new LTO API (llvm-lto2). TargetLibraryInfoImpl in LTO backend passes 
+; receive the VecLib parameter from TargetMachine Options.
+
+; CHECK: @llvm.compiler.used = appending global [1 x ptr] [ptr @armpl_vsinq_f64]
+; CHECK: declare aarch64_vector_pcs <2 x double> @armpl_vsinq_f64(<2 x double>)
+
+target triple = "aarch64-unknown-linux-gnu"
+
+ at llvm.compiler.used = appending global [1 x ptr] [ptr @armpl_vsinq_f64], section "llvm.metadata"
+
+declare aarch64_vector_pcs <2 x double> @armpl_vsinq_f64(<2 x double>)
+
+define void @compute(ptr %out, ptr %in) {
+entry:
+  %v = load <2 x double>, ptr %in, align 16
+  %result = call aarch64_vector_pcs <2 x double> @armpl_vsinq_f64(<2 x double> %v)
+  store <2 x double> %result, ptr %out, align 16
+  ret void
+}

>From 4dea89047ab868bcbe44b56f8b27f11308c08338 Mon Sep 17 00:00:00 2001
From: Usha Gupta <usha.gupta at arm.com>
Date: Mon, 8 Dec 2025 14:36:45 +0000
Subject: [PATCH 3/4] Update test to use named values

---
 llvm/test/LTO/AArch64/frem-scalable-veclib.ll | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/test/LTO/AArch64/frem-scalable-veclib.ll b/llvm/test/LTO/AArch64/frem-scalable-veclib.ll
index 445aef9bd4ffc..f4e059323d8bc 100644
--- a/llvm/test/LTO/AArch64/frem-scalable-veclib.ll
+++ b/llvm/test/LTO/AArch64/frem-scalable-veclib.ll
@@ -13,8 +13,8 @@
 
 target triple = "aarch64-unknown-linux-gnu"
 
-define fastcc <vscale x 2 x double> @compute(<vscale x 2 x double> %0) {
+define <vscale x 2 x double> @compute(<vscale x 2 x double> %a, <vscale x 2 x double> %b) {
 entry:
-  %1 = frem <vscale x 2 x double> %0, zeroinitializer
-  ret <vscale x 2 x double> %1
+  %rem = frem <vscale x 2 x double> %a, %b
+  ret <vscale x 2 x double> %rem
 }

>From f9ff5396b45846e40bb99ffa16a96a2609c9bb50 Mon Sep 17 00:00:00 2001
From: Usha Gupta <usha.gupta at arm.com>
Date: Mon, 8 Dec 2025 14:51:49 +0000
Subject: [PATCH 4/4] Address review comments

---
 llvm/test/LTO/AArch64/frem-scalable-veclib.ll | 1 -
 llvm/test/LTO/AArch64/veclib-armpl-lto.ll     | 1 -
 llvm/test/LTO/AArch64/veclib-armpl-lto2.ll    | 1 -
 3 files changed, 3 deletions(-)

diff --git a/llvm/test/LTO/AArch64/frem-scalable-veclib.ll b/llvm/test/LTO/AArch64/frem-scalable-veclib.ll
index f4e059323d8bc..6e9edfef67f21 100644
--- a/llvm/test/LTO/AArch64/frem-scalable-veclib.ll
+++ b/llvm/test/LTO/AArch64/frem-scalable-veclib.ll
@@ -1,4 +1,3 @@
-; REQUIRES: aarch64-registered-target
 ; RUN: opt -module-summary %s -o %t.bc
 ; RUN: llvm-lto2 run %t.bc -o %t.o -save-temps \
 ; RUN:   -r %t.bc,compute,px \
diff --git a/llvm/test/LTO/AArch64/veclib-armpl-lto.ll b/llvm/test/LTO/AArch64/veclib-armpl-lto.ll
index 4df1a30e4f114..713f8b381d8da 100644
--- a/llvm/test/LTO/AArch64/veclib-armpl-lto.ll
+++ b/llvm/test/LTO/AArch64/veclib-armpl-lto.ll
@@ -1,4 +1,3 @@
-; REQUIRES: aarch64-registered-target
 ; RUN: llvm-as %s -o %t.bc
 ; RUN: llvm-lto -exported-symbol=compute -exported-symbol=armpl_vsinq_f64 -o %t.o %t.bc
 ; RUN: llvm-nm %t.o | FileCheck %s
diff --git a/llvm/test/LTO/AArch64/veclib-armpl-lto2.ll b/llvm/test/LTO/AArch64/veclib-armpl-lto2.ll
index 63594d0019a42..9873910a08cdc 100644
--- a/llvm/test/LTO/AArch64/veclib-armpl-lto2.ll
+++ b/llvm/test/LTO/AArch64/veclib-armpl-lto2.ll
@@ -1,4 +1,3 @@
-; REQUIRES: aarch64-registered-target
 ; RUN: opt -module-summary %s -o %t.bc
 ; RUN: llvm-lto2 run -save-temps -o %t.o %t.bc \
 ; RUN:   -r=%t.bc,compute,px \



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