[llvm] [llvm-mca][AArch64] Refactor Neoverse tests to split out common inputs (NFC) (PR #170324)

Cullen Rhodes via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 8 04:34:57 PST 2025


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@@ -0,0 +1,60 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=neoverse-n2 -instruction-tables < %p/Inputs/rcpc-immo-instructions.s | FileCheck %s
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  2      1     0.50    *                   ldapur	w7, [x24]
+# CHECK-NEXT:  2      1     0.50    *                   ldapur	x20, [x13]
+# CHECK-NEXT:  2      1     0.50    *                   ldapurb	w13, [x17]
+# CHECK-NEXT:  2      1     0.50    *                   ldapurh	w3, [x22]
+# CHECK-NEXT:  2      1     0.50                  U     ldapursb	w7, [x8]
+# CHECK-NEXT:  2      1     0.50                  U     ldapursb	x29, [x7]
+# CHECK-NEXT:  2      1     0.50                  U     ldapursh	w17, [x19]
+# CHECK-NEXT:  2      1     0.50                  U     ldapursh	x3, [x3]
+# CHECK-NEXT:  2      1     0.50                  U     ldapursw	x3, [x18]
----------------
c-rhodes wrote:

I agree, but just to clarify it's nothing to do with this PR, this was missed when the instructions were added. You can post a PR if you like since you spotted it, but I'm happy to fix it if not.

https://github.com/llvm/llvm-project/pull/170324


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