[llvm] f41edb3 - [AMDGPU] Add test cases for v_fmac_dx9_zero_f32 aka v_fmac_legacy_f32 (#171108)

[via llvm-commits]

Author: Jay Foad
Date: 2025-12-08T11:42:10Z
New Revision: f41edb3fb9143e1fdc0bd326241af12d4a3cf56b

URL: https://github.com/llvm/llvm-project/commit/f41edb3fb9143e1fdc0bd326241af12d4a3cf56b
DIFF: https://github.com/llvm/llvm-project/commit/f41edb3fb9143e1fdc0bd326241af12d4a3cf56b.diff

LOG: [AMDGPU] Add test cases for v_fmac_dx9_zero_f32 aka v_fmac_legacy_f32 (#171108)

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
index 4b27208935633..dab67cde215f4 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
@@ -1,8 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1030 < %s | FileCheck -check-prefix=GFX10 %s
-; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1030 < %s | FileCheck -check-prefix=GFX10 %s
-; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX11 %s
-; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX11 %s
+; RUN: llc -global-isel=0 -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1030 < %s | FileCheck -check-prefix=GFX10 %s
+; RUN: llc -global-isel=1 -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1030 < %s | FileCheck -check-prefix=GFX10 %s
+; RUN: llc -global-isel=0 -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX11 %s
+; RUN: llc -global-isel=1 -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX11 %s
 
 define float @v_fma(float %a, float %b, float %c)  {
 ; GFX10-LABEL: v_fma:
@@ -20,6 +20,22 @@ define float @v_fma(float %a, float %b, float %c)  {
   ret float %fma
 }
 
+define float @v_fmac(float %a, float %b, float %c)  {
+; GFX10-LABEL: v_fmac:
+; GFX10:       ; %bb.0:
+; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT:    v_fmac_legacy_f32_e32 v0, v1, v2
+; GFX10-NEXT:    s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_fmac:
+; GFX11:       ; %bb.0:
+; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT:    v_fmac_dx9_zero_f32_e32 v0, v1, v2
+; GFX11-NEXT:    s_setpc_b64 s[30:31]
+  %fma = call float @llvm.amdgcn.fma.legacy(float %b, float %c, float %a)
+  ret float %fma
+}
+
 define float @v_fma_imm(float %a, float %c)  {
 ; GFX10-LABEL: v_fma_imm:
 ; GFX10:       ; %bb.0:
@@ -36,6 +52,22 @@ define float @v_fma_imm(float %a, float %c)  {
   ret float %fma
 }
 
+define float @v_fmac_imm(float %a, float %c)  {
+; GFX10-LABEL: v_fmac_imm:
+; GFX10:       ; %bb.0:
+; GFX10-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT:    v_fmac_legacy_f32_e32 v0, 0x41200000, v1
+; GFX10-NEXT:    s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: v_fmac_imm:
+; GFX11:       ; %bb.0:
+; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT:    v_fmac_dx9_zero_f32_e32 v0, 0x41200000, v1
+; GFX11-NEXT:    s_setpc_b64 s[30:31]
+  %fma = call float @llvm.amdgcn.fma.legacy(float 10.0, float %c, float %a)
+  ret float %fma
+}
+
 define float @v_fabs_fma(float %a, float %b, float %c)  {
 ; GFX10-LABEL: v_fabs_fma:
 ; GFX10:       ; %bb.0: