[llvm] [LoongArch] Custom lowering for 128-bit vector integer shifts (PR #171097)
Lu Weining via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 8 02:16:08 PST 2025
================
@@ -618,10 +618,71 @@ SDValue LoongArchTargetLowering::LowerOperation(SDValue Op,
return lowerVECREDUCE(Op, DAG);
case ISD::ConstantFP:
return lowerConstantFP(Op, DAG);
+ case ISD::SRA:
+ case ISD::SRL:
+ case ISD::SHL:
+ return lowerVectorSRA_SRL_SHL(Op, DAG);
}
return SDValue();
}
+/// getVShiftImm - Check if this is a valid build_vector for the immediate
+/// operand of a vector shift operation, where all the elements of the
+/// build_vector must have the same constant integer value.
+static bool getVShiftImm(SDValue Op, unsigned ElementBits, int64_t &Cnt) {
----------------
SixWeining wrote:
Generally, `amt` is used to represent the shift amount.
```suggestion
static bool getVShiftAmt(SDValue Op, unsigned ElementBits, int64_t &Amt) {
```
https://github.com/llvm/llvm-project/pull/171097
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