[llvm] [AArch64] Use a load instead of a store for inline stack probes (PR #170855)
Benjamin Lerman via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 8 01:45:04 PST 2025
https://github.com/qsr updated https://github.com/llvm/llvm-project/pull/170855
>From 113caac135c5cfb1fdd4bac394ce3c5cd4978bdf Mon Sep 17 00:00:00 2001
From: Benjamin Lerman <qsr at google.com>
Date: Fri, 5 Dec 2025 14:57:08 +0100
Subject: [PATCH] [AArch64] Use a load instead of a store for inline stack
probes
load are enough to trigger any guard and prevent stack overflow. On the
other hand, load will not trigger a COW of the zero page and so ensure
the page doesn't require to use physical memory if it is never touched
by the code. This happens frequently when big buffer are put on the
stack.
---
.../Target/AArch64/AArch64FrameLowering.cpp | 18 ++++----
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 6 +--
.../AArch64/AArch64PrologueEpilogue.cpp | 12 +++---
llvm/test/CodeGen/AArch64/sme-agnostic-za.ll | 4 +-
llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll | 4 +-
.../AArch64/sme-za-lazy-save-buffer.ll | 8 ++--
.../AArch64/split-sve-stack-frame-layout.ll | 4 +-
.../test/CodeGen/AArch64/stack-probing-64k.ll | 38 ++++++++---------
.../CodeGen/AArch64/stack-probing-dynamic.ll | 24 +++++------
.../AArch64/stack-probing-last-in-block.mir | 4 +-
.../AArch64/stack-probing-no-scratch-reg.mir | 6 +--
.../AArch64/stack-probing-shrink-wrap.mir | 6 +--
.../test/CodeGen/AArch64/stack-probing-sve.ll | 20 ++++-----
llvm/test/CodeGen/AArch64/stack-probing.ll | 42 +++++++++----------
14 files changed, 99 insertions(+), 97 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index c2f5c0368a782..3e8ad4b2d71f4 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -3753,9 +3753,9 @@ AArch64FrameLowering::inlineStackProbeLoopExactMultiple(
emitFrameOffset(*LoopMBB, LoopMBB->end(), DL, AArch64::SP, AArch64::SP,
StackOffset::getFixed(-ProbeSize), TII,
MachineInstr::FrameSetup);
- // STR XZR, [SP]
- BuildMI(*LoopMBB, LoopMBB->end(), DL, TII->get(AArch64::STRXui))
- .addReg(AArch64::XZR)
+ // LDR XZR, [SP]
+ BuildMI(*LoopMBB, LoopMBB->end(), DL, TII->get(AArch64::LDRXui))
+ .addDef(AArch64::XZR)
.addReg(AArch64::SP)
.addImm(0)
.setMIFlags(MachineInstr::FrameSetup);
@@ -3815,9 +3815,9 @@ void AArch64FrameLowering::inlineStackProbeFixed(
MachineInstr::FrameSetup, false, false, nullptr,
EmitAsyncCFI && !HasFP, CFAOffset);
CFAOffset += StackOffset::getFixed(ProbeSize);
- // STR XZR, [SP]
- BuildMI(*MBB, MBBI, DL, TII->get(AArch64::STRXui))
- .addReg(AArch64::XZR)
+ // LDR XZR, [SP]
+ BuildMI(*MBB, MBBI, DL, TII->get(AArch64::LDRXui))
+ .addDef(AArch64::XZR)
.addReg(AArch64::SP)
.addImm(0)
.setMIFlags(MachineInstr::FrameSetup);
@@ -3847,9 +3847,9 @@ void AArch64FrameLowering::inlineStackProbeFixed(
MachineInstr::FrameSetup, false, false, nullptr,
EmitAsyncCFI && !HasFP, CFAOffset);
if (ResidualSize > AArch64::StackProbeMaxUnprobedStack) {
- // STR XZR, [SP]
- BuildMI(*MBB, MBBI, DL, TII->get(AArch64::STRXui))
- .addReg(AArch64::XZR)
+ // LDR XZR, [SP]
+ BuildMI(*MBB, MBBI, DL, TII->get(AArch64::LDRXui))
+ .addDef(AArch64::XZR)
.addReg(AArch64::SP)
.addImm(0)
.setMIFlags(MachineInstr::FrameSetup);
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index 904577b8233d5..8f05e46b38fd3 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -11140,9 +11140,9 @@ AArch64InstrInfo::probedStackAlloc(MachineBasicBlock::iterator MBBI,
.addMBB(ExitMBB)
.setMIFlags(Flags);
- // STR XZR, [SP]
- BuildMI(*LoopBodyMBB, LoopBodyMBB->end(), DL, TII->get(AArch64::STRXui))
- .addReg(AArch64::XZR)
+ // LDR XZR, [SP]
+ BuildMI(*LoopBodyMBB, LoopBodyMBB->end(), DL, TII->get(AArch64::LDRXui))
+ .addDef(AArch64::XZR)
.addReg(AArch64::SP)
.addImm(0)
.setMIFlags(Flags);
diff --git a/llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp b/llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
index 965585f40571b..38a6e16324a35 100644
--- a/llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
+++ b/llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
@@ -555,9 +555,9 @@ void AArch64PrologueEmitter::allocateStackSpace(
// objects), we need to issue an extra probe, so these allocations start in
// a known state.
if (FollowupAllocs) {
- // STR XZR, [SP]
- BuildMI(MBB, MBBI, DL, TII->get(AArch64::STRXui))
- .addReg(AArch64::XZR)
+ // LDR XZR, [SP]
+ BuildMI(MBB, MBBI, DL, TII->get(AArch64::LDRXui))
+ .addDef(AArch64::XZR)
.addReg(AArch64::SP)
.addImm(0)
.setMIFlags(MachineInstr::FrameSetup);
@@ -590,9 +590,9 @@ void AArch64PrologueEmitter::allocateStackSpace(
}
if (FollowupAllocs || upperBound(AllocSize) + RealignmentPadding >
AArch64::StackProbeMaxUnprobedStack) {
- // STR XZR, [SP]
- BuildMI(MBB, MBBI, DL, TII->get(AArch64::STRXui))
- .addReg(AArch64::XZR)
+ // LDR XZR, [SP]
+ BuildMI(MBB, MBBI, DL, TII->get(AArch64::LDRXui))
+ .addDef(AArch64::XZR)
.addReg(AArch64::SP)
.addImm(0)
.setMIFlags(MachineInstr::FrameSetup);
diff --git a/llvm/test/CodeGen/AArch64/sme-agnostic-za.ll b/llvm/test/CodeGen/AArch64/sme-agnostic-za.ll
index 0906e10b551b7..194ccdd270271 100644
--- a/llvm/test/CodeGen/AArch64/sme-agnostic-za.ll
+++ b/llvm/test/CodeGen/AArch64/sme-agnostic-za.ll
@@ -365,7 +365,7 @@ define void @agnostic_za_buffer_alloc_with_stack_probes() nounwind "aarch64_za_s
; CHECK-NEXT: cmp sp, x19
; CHECK-NEXT: b.le .LBB7_3
; CHECK-NEXT: // %bb.2: // in Loop: Header=BB7_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB7_1
; CHECK-NEXT: .LBB7_3:
; CHECK-NEXT: mov sp, x19
@@ -395,7 +395,7 @@ define void @agnostic_za_buffer_alloc_with_stack_probes() nounwind "aarch64_za_s
; CHECK-NEWLOWERING-NEXT: cmp sp, x19
; CHECK-NEWLOWERING-NEXT: b.le .LBB7_3
; CHECK-NEWLOWERING-NEXT: // %bb.2: // in Loop: Header=BB7_1 Depth=1
-; CHECK-NEWLOWERING-NEXT: str xzr, [sp]
+; CHECK-NEWLOWERING-NEXT: ldr xzr, [sp]
; CHECK-NEWLOWERING-NEXT: b .LBB7_1
; CHECK-NEWLOWERING-NEXT: .LBB7_3:
; CHECK-NEWLOWERING-NEXT: mov sp, x19
diff --git a/llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll b/llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
index 06fb52ae10374..e23f754075abd 100644
--- a/llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
+++ b/llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
@@ -569,8 +569,8 @@ define void @vg_unwind_multiple_scratch_regs(ptr %out) #1 {
; CHECK-NEXT: .LBB4_1: // %entry
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: sub sp, sp, #1, lsl #12 // =4096
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: cmp sp, x9
-; CHECK-NEXT: str xzr, [sp]
; CHECK-NEXT: b.ne .LBB4_1
; CHECK-NEXT: // %bb.2: // %entry
; CHECK-NEXT: .cfi_def_cfa_register wsp
@@ -630,8 +630,8 @@ define void @vg_unwind_multiple_scratch_regs(ptr %out) #1 {
; FP-CHECK-NEXT: .LBB4_1: // %entry
; FP-CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; FP-CHECK-NEXT: sub sp, sp, #1, lsl #12 // =4096
+; FP-CHECK-NEXT: ldr xzr, [sp]
; FP-CHECK-NEXT: cmp sp, x9
-; FP-CHECK-NEXT: str xzr, [sp]
; FP-CHECK-NEXT: b.ne .LBB4_1
; FP-CHECK-NEXT: // %bb.2: // %entry
; FP-CHECK-NEXT: mov x8, sp
diff --git a/llvm/test/CodeGen/AArch64/sme-za-lazy-save-buffer.ll b/llvm/test/CodeGen/AArch64/sme-za-lazy-save-buffer.ll
index afd56d198d0d3..6e9d9108c85d1 100644
--- a/llvm/test/CodeGen/AArch64/sme-za-lazy-save-buffer.ll
+++ b/llvm/test/CodeGen/AArch64/sme-za-lazy-save-buffer.ll
@@ -68,7 +68,7 @@ define float @multi_bb_stpidr2_save_required_stackprobe(i32 %a, float %b, float
; CHECK: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: mov x29, sp
-; CHECK-NEXT: str xzr, [sp, #-16]!
+; CHECK-NEXT: ldr xzr, [sp, #-16]!
; CHECK-NEXT: .cfi_def_cfa w29, 16
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
@@ -80,7 +80,7 @@ define float @multi_bb_stpidr2_save_required_stackprobe(i32 %a, float %b, float
; CHECK-NEXT: cmp sp, x9
; CHECK-NEXT: b.le .LBB2_3
; CHECK-NEXT: // %bb.2: // in Loop: Header=BB2_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB2_1
; CHECK-NEXT: .LBB2_3:
; CHECK-NEXT: mov sp, x9
@@ -113,7 +113,7 @@ define float @multi_bb_stpidr2_save_required_stackprobe(i32 %a, float %b, float
; CHECK-NEWLOWERING: // %bb.0:
; CHECK-NEWLOWERING-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEWLOWERING-NEXT: mov x29, sp
-; CHECK-NEWLOWERING-NEXT: str xzr, [sp, #-16]!
+; CHECK-NEWLOWERING-NEXT: ldr xzr, [sp, #-16]!
; CHECK-NEWLOWERING-NEXT: .cfi_def_cfa w29, 16
; CHECK-NEWLOWERING-NEXT: .cfi_offset w30, -8
; CHECK-NEWLOWERING-NEXT: .cfi_offset w29, -16
@@ -127,7 +127,7 @@ define float @multi_bb_stpidr2_save_required_stackprobe(i32 %a, float %b, float
; CHECK-NEWLOWERING-NEXT: cmp sp, x9
; CHECK-NEWLOWERING-NEXT: b.le .LBB2_3
; CHECK-NEWLOWERING-NEXT: // %bb.2: // in Loop: Header=BB2_1 Depth=1
-; CHECK-NEWLOWERING-NEXT: str xzr, [sp]
+; CHECK-NEWLOWERING-NEXT: ldr xzr, [sp]
; CHECK-NEWLOWERING-NEXT: b .LBB2_1
; CHECK-NEWLOWERING-NEXT: .LBB2_3:
; CHECK-NEWLOWERING-NEXT: mov sp, x9
diff --git a/llvm/test/CodeGen/AArch64/split-sve-stack-frame-layout.ll b/llvm/test/CodeGen/AArch64/split-sve-stack-frame-layout.ll
index 492f73e8a0d2a..c237248085df3 100644
--- a/llvm/test/CodeGen/AArch64/split-sve-stack-frame-layout.ll
+++ b/llvm/test/CodeGen/AArch64/split-sve-stack-frame-layout.ll
@@ -770,7 +770,7 @@ define void @zpr_and_ppr_local_stack_probing(<vscale x 16 x i1> %pred, <vscale x
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: sub sp, sp, #2848
; CHECK-NEXT: addvl sp, sp, #-2
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: .cfi_escape 0x0f, 0x09, 0x8f, 0xb0, 0x16, 0x92, 0x2e, 0x00, 0x40, 0x1e, 0x22 // sp + 2864 + 16 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: add x8, sp, #2848
@@ -1102,3 +1102,5 @@ define void @sve_locals_zpr_ppr_csr_vla(i64 %n, <vscale x 16 x i1> %pred, <vscal
store volatile <vscale x 16 x i8> %vector, ptr %zpr_local
ret void
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-FRAMELAYOUT: {{.*}}
diff --git a/llvm/test/CodeGen/AArch64/stack-probing-64k.ll b/llvm/test/CodeGen/AArch64/stack-probing-64k.ll
index 5f833e32fb8cb..4217a9096affb 100644
--- a/llvm/test/CodeGen/AArch64/stack-probing-64k.ll
+++ b/llvm/test/CodeGen/AArch64/stack-probing-64k.ll
@@ -13,7 +13,7 @@ define void @static_65536(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub sp, sp, #16, lsl #12 // =65536
; CHECK-NEXT: .cfi_def_cfa_offset 65552
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
; CHECK-NEXT: add sp, sp, #16, lsl #12 // =65536
@@ -37,7 +37,7 @@ define void @static_65552(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub sp, sp, #16, lsl #12 // =65536
; CHECK-NEXT: .cfi_def_cfa_offset 65552
-; CHECK-NEXT: str xzr, [sp], #-16
+; CHECK-NEXT: ldr xzr, [sp], #-16
; CHECK-NEXT: .cfi_def_cfa_offset 65568
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
@@ -64,7 +64,7 @@ define void @static_66560(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub sp, sp, #16, lsl #12 // =65536
; CHECK-NEXT: .cfi_def_cfa_offset 65552
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #1024
; CHECK-NEXT: .cfi_def_cfa_offset 66576
; CHECK-NEXT: mov x8, sp
@@ -92,10 +92,10 @@ define void @static_66576(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub sp, sp, #16, lsl #12 // =65536
; CHECK-NEXT: .cfi_def_cfa_offset 65552
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #1040
; CHECK-NEXT: .cfi_def_cfa_offset 66592
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
; CHECK-NEXT: add sp, sp, #16, lsl #12 // =65536
@@ -121,10 +121,10 @@ define void @static_132096(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub sp, sp, #16, lsl #12 // =65536
; CHECK-NEXT: .cfi_def_cfa_offset 65552
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #16, lsl #12 // =65536
; CHECK-NEXT: .cfi_def_cfa_offset 131088
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #1024
; CHECK-NEXT: .cfi_def_cfa_offset 132112
; CHECK-NEXT: mov x8, sp
@@ -152,21 +152,21 @@ define void @static_327664(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub sp, sp, #16, lsl #12 // =65536
; CHECK-NEXT: .cfi_def_cfa_offset 65552
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #16, lsl #12 // =65536
; CHECK-NEXT: .cfi_def_cfa_offset 131088
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #16, lsl #12 // =65536
; CHECK-NEXT: .cfi_def_cfa_offset 196624
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #16, lsl #12 // =65536
; CHECK-NEXT: .cfi_def_cfa_offset 262160
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #15, lsl #12 // =61440
; CHECK-NEXT: .cfi_def_cfa_offset 323600
; CHECK-NEXT: sub sp, sp, #4080
; CHECK-NEXT: .cfi_def_cfa_offset 327680
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
; CHECK-NEXT: add sp, sp, #79, lsl #12 // =323584
@@ -195,7 +195,7 @@ define void @static_327680(ptr %out) #0 {
; CHECK-NEXT: .LBB6_1: // %entry
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: sub sp, sp, #16, lsl #12 // =65536
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: cmp sp, x9
; CHECK-NEXT: b.ne .LBB6_1
; CHECK-NEXT: // %bb.2: // %entry
@@ -227,7 +227,7 @@ define void @static_328704(ptr %out) #0 {
; CHECK-NEXT: .LBB7_1: // %entry
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: sub sp, sp, #16, lsl #12 // =65536
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: cmp sp, x9
; CHECK-NEXT: b.ne .LBB7_1
; CHECK-NEXT: // %bb.2: // %entry
@@ -263,14 +263,14 @@ define void @static_328720(ptr %out) #0 {
; CHECK-NEXT: .LBB8_1: // %entry
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: sub sp, sp, #16, lsl #12 // =65536
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: cmp sp, x9
; CHECK-NEXT: b.ne .LBB8_1
; CHECK-NEXT: // %bb.2: // %entry
; CHECK-NEXT: .cfi_def_cfa_register wsp
; CHECK-NEXT: sub sp, sp, #1040
; CHECK-NEXT: .cfi_def_cfa_offset 328736
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
; CHECK-NEXT: add sp, sp, #80, lsl #12 // =327680
@@ -309,7 +309,7 @@ define void @static_16_align_131072(ptr %out) #0 {
; CHECK-NEXT: b.le .LBB9_3
; CHECK-NEXT: // %bb.2: // %entry
; CHECK-NEXT: // in Loop: Header=BB9_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB9_1
; CHECK-NEXT: .LBB9_3: // %entry
; CHECK-NEXT: mov sp, x9
@@ -343,7 +343,7 @@ define void @static_16_align_8192(ptr %out) #0 {
; CHECK-NEXT: sub x9, sp, #1, lsl #12 // =4096
; CHECK-NEXT: sub x9, x9, #4080
; CHECK-NEXT: and sp, x9, #0xffffffffffffe000
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
; CHECK-NEXT: mov sp, x29
@@ -373,7 +373,7 @@ define void @static_32752_align_32k(ptr %out) #0 {
; CHECK-NEXT: sub x9, sp, #7, lsl #12 // =28672
; CHECK-NEXT: sub x9, x9, #4080
; CHECK-NEXT: and sp, x9, #0xffffffffffff8000
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
; CHECK-NEXT: mov sp, x29
diff --git a/llvm/test/CodeGen/AArch64/stack-probing-dynamic.ll b/llvm/test/CodeGen/AArch64/stack-probing-dynamic.ll
index 6bc8bccac7472..e69174472e662 100644
--- a/llvm/test/CodeGen/AArch64/stack-probing-dynamic.ll
+++ b/llvm/test/CodeGen/AArch64/stack-probing-dynamic.ll
@@ -24,7 +24,7 @@ define void @dynamic(i64 %size, ptr %out) #0 {
; CHECK-NEXT: cmp sp, x8
; CHECK-NEXT: b.le .LBB0_3
; CHECK-NEXT: // %bb.2: // in Loop: Header=BB0_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB0_1
; CHECK-NEXT: .LBB0_3:
; CHECK-NEXT: mov sp, x8
@@ -56,7 +56,7 @@ define void @dynamic_fixed(i64 %size, ptr %out1, ptr %out2) #0 {
; CHECK-NEXT: .cfi_def_cfa w29, 16
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
-; CHECK-NEXT: str xzr, [sp, #-64]!
+; CHECK-NEXT: ldr xzr, [sp, #-64]!
; CHECK-NEXT: add x9, x0, #15
; CHECK-NEXT: mov x8, sp
; CHECK-DAG: sub x10, x29, #64
@@ -69,7 +69,7 @@ define void @dynamic_fixed(i64 %size, ptr %out1, ptr %out2) #0 {
; CHECK-NEXT: cmp sp, x8
; CHECK-NEXT: b.le .LBB1_3
; CHECK-NEXT: // %bb.2: // in Loop: Header=BB1_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB1_1
; CHECK-NEXT: .LBB1_3:
; CHECK-NEXT: mov sp, x8
@@ -109,7 +109,7 @@ define void @dynamic_align_64(i64 %size, ptr %out) #0 {
; CHECK-NEXT: and sp, x9, #0xffffffffffffffc0
; CHECK-NEXT: add x9, x0, #15
; CHECK-NEXT: mov x8, sp
-; CHECK-DAG: str xzr, [sp]
+; CHECK-DAG: ldr xzr, [sp]
; CHECK-DAG: and x9, x9, #0xfffffffffffffff0
; CHECK-NOT: INVALID_TO_BREAK_UP_CHECK_DAG
; CHECK-DAG: mov x19, sp
@@ -120,7 +120,7 @@ define void @dynamic_align_64(i64 %size, ptr %out) #0 {
; CHECK-NEXT: cmp sp, x8
; CHECK-NEXT: b.le .LBB2_3
; CHECK-NEXT: // %bb.2: // in Loop: Header=BB2_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB2_1
; CHECK-NEXT: .LBB2_3:
; CHECK-NEXT: mov sp, x8
@@ -163,7 +163,7 @@ define void @dynamic_align_8192(i64 %size, ptr %out) #0 {
; CHECK-NEXT: cmp sp, x9
; CHECK-NEXT: b.le .LBB3_3
; CHECK-NEXT: // %bb.2: // in Loop: Header=BB3_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB3_1
; CHECK-NEXT: .LBB3_3:
; CHECK-NEXT: mov sp, x9
@@ -180,7 +180,7 @@ define void @dynamic_align_8192(i64 %size, ptr %out) #0 {
; CHECK-NEXT: cmp sp, x8
; CHECK-NEXT: b.le .LBB3_6
; CHECK-NEXT: // %bb.5: // in Loop: Header=BB3_4 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB3_4
; CHECK-NEXT: .LBB3_6:
; CHECK-NEXT: mov sp, x8
@@ -220,7 +220,7 @@ define void @dynamic_64k_guard(i64 %size, ptr %out) #0 "stack-probe-size"="65536
; CHECK-NEXT: cmp sp, x8
; CHECK-NEXT: b.le .LBB4_3
; CHECK-NEXT: // %bb.2: // in Loop: Header=BB4_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB4_1
; CHECK-NEXT: .LBB4_3:
; CHECK-NEXT: mov sp, x8
@@ -264,13 +264,13 @@ define void @no_reserved_call_frame(i64 %n) #0 {
; CHECK-NEXT: b.le .LBB5_3
; CHECK-NEXT: // %bb.2: // %entry
; CHECK-NEXT: // in Loop: Header=BB5_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB5_1
; CHECK-NEXT: .LBB5_3: // %entry
; CHECK-NEXT: mov sp, x0
; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #1104
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: bl callee_stack_args
; CHECK-NEXT: add sp, sp, #1104
; CHECK-NEXT: mov sp, x29
@@ -300,8 +300,8 @@ define void @reserved_call_frame(i64 %n) #0 {
; CHECK-NEXT: .cfi_offset w30, -24
; CHECK-NEXT: .cfi_offset w29, -32
; CHECK-NEXT: sub sp, sp, #1504
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: add x0, sp, #1104
-; CHECK-NEXT: str xzr, [sp]
; CHECK-NEXT: bl callee_stack_args
; CHECK-NEXT: add sp, sp, #1504
; CHECK-NEXT: .cfi_def_cfa wsp, 32
@@ -343,7 +343,7 @@ define void @dynamic_sve(i64 %size, ptr %out) #0 "target-features"="+sve" {
; CHECK-NEXT: cmp sp, x8
; CHECK-NEXT: b.le .LBB7_3
; CHECK-NEXT: // %bb.2: // in Loop: Header=BB7_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB7_1
; CHECK-NEXT: .LBB7_3:
; CHECK-NEXT: mov sp, x8
diff --git a/llvm/test/CodeGen/AArch64/stack-probing-last-in-block.mir b/llvm/test/CodeGen/AArch64/stack-probing-last-in-block.mir
index 25184b0c0b56a..deba15ba37798 100644
--- a/llvm/test/CodeGen/AArch64/stack-probing-last-in-block.mir
+++ b/llvm/test/CodeGen/AArch64/stack-probing-last-in-block.mir
@@ -96,7 +96,7 @@ body: |
; CHECK-NEXT: liveins: $x9
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $sp = frame-setup SUBXri $sp, 1, 12
- ; CHECK-NEXT: frame-setup STRXui $xzr, $sp, 0
+ ; CHECK-NEXT: $xzr = frame-setup LDRXui $sp, 0
; CHECK-NEXT: $xzr = frame-setup SUBSXrx64 $sp, $x9, 24, implicit-def $nzcv
; CHECK-NEXT: frame-setup Bcc 1, %bb.3, implicit $nzcv
; CHECK-NEXT: {{ $}}
@@ -106,7 +106,7 @@ body: |
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $wsp
; CHECK-NEXT: $sp = frame-setup SUBXri $sp, 3392, 0
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 200016
- ; CHECK-NEXT: frame-setup STRXui $xzr, $sp, 0
+ ; CHECK-NEXT: $xzr = frame-setup LDRXui $sp, 0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1.loop:
; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000)
diff --git a/llvm/test/CodeGen/AArch64/stack-probing-no-scratch-reg.mir b/llvm/test/CodeGen/AArch64/stack-probing-no-scratch-reg.mir
index a9c9b5ff60e45..05d97770d5aee 100644
--- a/llvm/test/CodeGen/AArch64/stack-probing-no-scratch-reg.mir
+++ b/llvm/test/CodeGen/AArch64/stack-probing-no-scratch-reg.mir
@@ -45,7 +45,7 @@ body: |
; CHECK-LABEL: name: f
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.3(0x80000000)
- ; CHECK-NEXT: liveins: $w0, $lr
+ ; CHECK-NEXT: liveins: $w0, $lr, $fp
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: early-clobber $sp = frame-setup STPXpre killed $fp, killed $lr, $sp, -2 :: (store (s64) into %stack.2), (store (s64) into %stack.1)
; CHECK-NEXT: $x9 = frame-setup SUBXri $sp, 36, 12
@@ -55,7 +55,7 @@ body: |
; CHECK-NEXT: liveins: $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $x18, $x19, $x20, $x21, $x22, $x23, $x25, $x27, $x28
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $sp = frame-setup SUBXri $sp, 1, 12
- ; CHECK-NEXT: frame-setup STRXui $xzr, $sp, 0
+ ; CHECK-NEXT: $xzr = frame-setup LDRXui $sp, 0
; CHECK-NEXT: $xzr = frame-setup SUBSXrx64 $sp, $x9, 24, implicit-def $nzcv
; CHECK-NEXT: frame-setup Bcc 1, %bb.3, implicit $nzcv
; CHECK-NEXT: {{ $}}
@@ -64,7 +64,7 @@ body: |
; CHECK-NEXT: liveins: $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $x18, $x19, $x20, $x21, $x22, $x23, $x25, $x27, $x28
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $sp = frame-setup SUBXri $sp, 2544, 0
- ; CHECK-NEXT: frame-setup STRXui $xzr, $sp, 0
+ ; CHECK-NEXT: $xzr = frame-setup LDRXui $sp, 0
; CHECK-NEXT: $x9 = IMPLICIT_DEF
; CHECK-NEXT: dead $wzr = SUBSWri killed renamable $w0, 1, 0, implicit-def $nzcv
; CHECK-NEXT: Bcc 12, %bb.2, implicit $nzcv
diff --git a/llvm/test/CodeGen/AArch64/stack-probing-shrink-wrap.mir b/llvm/test/CodeGen/AArch64/stack-probing-shrink-wrap.mir
index 985ec35213970..e02adfa29e6d4 100644
--- a/llvm/test/CodeGen/AArch64/stack-probing-shrink-wrap.mir
+++ b/llvm/test/CodeGen/AArch64/stack-probing-shrink-wrap.mir
@@ -47,7 +47,7 @@ body: |
; CHECK-LABEL: name: f
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.3(0x80000000)
- ; CHECK-NEXT: liveins: $w0, $lr
+ ; CHECK-NEXT: liveins: $w0, $lr, $fp
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: early-clobber $sp = frame-setup STPXpre killed $fp, killed $lr, $sp, -2 :: (store (s64) into %stack.2), (store (s64) into %stack.1)
; CHECK-NEXT: $x9 = frame-setup SUBXri $sp, 36, 12
@@ -57,7 +57,7 @@ body: |
; CHECK-NEXT: liveins: $w0, $x9
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $sp = frame-setup SUBXri $sp, 1, 12
- ; CHECK-NEXT: frame-setup STRXui $xzr, $sp, 0
+ ; CHECK-NEXT: $xzr = frame-setup LDRXui $sp, 0
; CHECK-NEXT: $xzr = frame-setup SUBSXrx64 $sp, $x9, 24, implicit-def $nzcv
; CHECK-NEXT: frame-setup Bcc 1, %bb.3, implicit $nzcv
; CHECK-NEXT: {{ $}}
@@ -66,7 +66,7 @@ body: |
; CHECK-NEXT: liveins: $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $sp = frame-setup SUBXri $sp, 2544, 0
- ; CHECK-NEXT: frame-setup STRXui $xzr, $sp, 0
+ ; CHECK-NEXT: $xzr = frame-setup LDRXui $sp, 0
; CHECK-NEXT: dead $wzr = SUBSWri killed renamable $w0, 1, 0, implicit-def $nzcv
; CHECK-NEXT: Bcc 12, %bb.2, implicit $nzcv
; CHECK-NEXT: B %bb.1
diff --git a/llvm/test/CodeGen/AArch64/stack-probing-sve.ll b/llvm/test/CodeGen/AArch64/stack-probing-sve.ll
index 79cf6d708c3e0..3f6d5dcaed8d0 100644
--- a/llvm/test/CodeGen/AArch64/stack-probing-sve.ll
+++ b/llvm/test/CodeGen/AArch64/stack-probing-sve.ll
@@ -64,7 +64,7 @@ define void @sve_16_vector(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-16
; CHECK-NEXT: .cfi_escape 0x0f, 0x0a, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x80, 0x01, 0x1e, 0x22 // sp + 16 + 128 * VG
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: addvl sp, sp, #16
; CHECK-NEXT: .cfi_def_cfa wsp, 16
; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
@@ -111,7 +111,7 @@ define void @sve_17_vector(ptr %out) #0 {
; CHECK-NEXT: b.le .LBB3_3
; CHECK-NEXT: // %bb.2: // %entry
; CHECK-NEXT: // in Loop: Header=BB3_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB3_1
; CHECK-NEXT: .LBB3_3: // %entry
; CHECK-NEXT: mov sp, x9
@@ -218,7 +218,7 @@ define void @sve_16v_csr(<vscale x 4 x float> %a) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-16
; CHECK-NEXT: .cfi_escape 0x0f, 0x0a, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x80, 0x01, 0x1e, 0x22 // sp + 16 + 128 * VG
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: str z23, [sp] // 16-byte Folded Spill
; CHECK-NEXT: str z22, [sp, #1, mul vl] // 16-byte Folded Spill
; CHECK-NEXT: str z21, [sp, #2, mul vl] // 16-byte Folded Spill
@@ -347,7 +347,7 @@ define void @sve_16v_1p_csr(<vscale x 4 x float> %a) #0 {
; CHECK-NEXT: b.le .LBB9_3
; CHECK-NEXT: // %bb.2: // %entry
; CHECK-NEXT: // in Loop: Header=BB9_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB9_1
; CHECK-NEXT: .LBB9_3: // %entry
; CHECK-NEXT: mov sp, x9
@@ -463,7 +463,7 @@ define void @sve_1_vector_4096_arr(ptr %out) #0 {
; CHECK-NEXT: b.le .LBB11_3
; CHECK-NEXT: // %bb.2: // %entry
; CHECK-NEXT: // in Loop: Header=BB11_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB11_1
; CHECK-NEXT: .LBB11_3: // %entry
; CHECK-NEXT: mov sp, x9
@@ -512,7 +512,7 @@ define void @sve_1_vector_16_arr_align_8192(ptr %out) #0 {
; CHECK-NEXT: b.le .LBB12_3
; CHECK-NEXT: // %bb.2: // %entry
; CHECK-NEXT: // in Loop: Header=BB12_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB12_1
; CHECK-NEXT: .LBB12_3: // %entry
; CHECK-NEXT: mov sp, x9
@@ -553,7 +553,7 @@ define void @sve_1024_64k_guard(ptr %out) #0 "stack-probe-size"="65536" {
; CHECK-NEXT: .cfi_escape 0x0f, 0x0a, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x80, 0x0e, 0x1e, 0x22 // sp + 16 + 1792 * VG
; CHECK-NEXT: addvl sp, sp, #-32
; CHECK-NEXT: .cfi_escape 0x0f, 0x0a, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x80, 0x10, 0x1e, 0x22 // sp + 16 + 2048 * VG
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: addvl sp, sp, #31
; CHECK-NEXT: .cfi_escape 0x0f, 0x0a, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x88, 0x0e, 0x1e, 0x22 // sp + 16 + 1800 * VG
; CHECK-NEXT: addvl sp, sp, #31
@@ -612,7 +612,7 @@ define void @sve_1028_64k_guard(ptr %out) #0 "stack-probe-size"="65536" {
; CHECK-NEXT: b.le .LBB14_3
; CHECK-NEXT: // %bb.2: // %entry
; CHECK-NEXT: // in Loop: Header=BB14_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB14_1
; CHECK-NEXT: .LBB14_3: // %entry
; CHECK-NEXT: mov sp, x9
@@ -657,7 +657,7 @@ define void @sve_5_vector(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-5
; CHECK-NEXT: .cfi_escape 0x0f, 0x09, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x28, 0x1e, 0x22 // sp + 16 + 40 * VG
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: addvl sp, sp, #5
; CHECK-NEXT: .cfi_def_cfa wsp, 16
; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
@@ -683,7 +683,7 @@ define void @sve_unprobed_area(<vscale x 4 x float> %a, i32 %n) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-4
; CHECK-NEXT: .cfi_escape 0x0f, 0x09, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x20, 0x1e, 0x22 // sp + 16 + 32 * VG
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: str p9, [sp, #7, mul vl] // 2-byte Spill
; CHECK-NEXT: str z10, [sp, #1, mul vl] // 16-byte Folded Spill
; CHECK-NEXT: str z9, [sp, #2, mul vl] // 16-byte Folded Spill
diff --git a/llvm/test/CodeGen/AArch64/stack-probing.ll b/llvm/test/CodeGen/AArch64/stack-probing.ll
index 3e0eaf1340aea..c2d9f5ff2c2ce 100644
--- a/llvm/test/CodeGen/AArch64/stack-probing.ll
+++ b/llvm/test/CodeGen/AArch64/stack-probing.ll
@@ -78,7 +78,7 @@ define void @static_1040(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub sp, sp, #1040
; CHECK-NEXT: .cfi_def_cfa_offset 1056
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
; CHECK-NEXT: add sp, sp, #1040
@@ -102,7 +102,7 @@ define void @static_4096(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub sp, sp, #1, lsl #12 // =4096
; CHECK-NEXT: .cfi_def_cfa_offset 4112
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
; CHECK-NEXT: add sp, sp, #1, lsl #12 // =4096
@@ -126,7 +126,7 @@ define void @static_4112(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub sp, sp, #1, lsl #12 // =4096
; CHECK-NEXT: .cfi_def_cfa_offset 4112
-; CHECK-NEXT: str xzr, [sp], #-16
+; CHECK-NEXT: ldr xzr, [sp], #-16
; CHECK-NEXT: .cfi_def_cfa_offset 4128
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
@@ -153,7 +153,7 @@ define void @static_5120(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub sp, sp, #1, lsl #12 // =4096
; CHECK-NEXT: .cfi_def_cfa_offset 4112
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #1024
; CHECK-NEXT: .cfi_def_cfa_offset 5136
; CHECK-NEXT: mov x8, sp
@@ -181,10 +181,10 @@ define void @static_5136(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub sp, sp, #1, lsl #12 // =4096
; CHECK-NEXT: .cfi_def_cfa_offset 4112
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #1040
; CHECK-NEXT: .cfi_def_cfa_offset 5152
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
; CHECK-NEXT: add sp, sp, #1, lsl #12 // =4096
@@ -210,10 +210,10 @@ define void @static_9216(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub sp, sp, #1, lsl #12 // =4096
; CHECK-NEXT: .cfi_def_cfa_offset 4112
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #1, lsl #12 // =4096
; CHECK-NEXT: .cfi_def_cfa_offset 8208
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #1024
; CHECK-NEXT: .cfi_def_cfa_offset 9232
; CHECK-NEXT: mov x8, sp
@@ -241,19 +241,19 @@ define void @static_20464(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub sp, sp, #1, lsl #12 // =4096
; CHECK-NEXT: .cfi_def_cfa_offset 4112
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #1, lsl #12 // =4096
; CHECK-NEXT: .cfi_def_cfa_offset 8208
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #1, lsl #12 // =4096
; CHECK-NEXT: .cfi_def_cfa_offset 12304
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #1, lsl #12 // =4096
; CHECK-NEXT: .cfi_def_cfa_offset 16400
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: sub sp, sp, #4080
; CHECK-NEXT: .cfi_def_cfa_offset 20480
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
; CHECK-NEXT: add sp, sp, #4, lsl #12 // =16384
@@ -282,7 +282,7 @@ define void @static_20480(ptr %out) #0 {
; CHECK-NEXT: .LBB10_1: // %entry
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: sub sp, sp, #1, lsl #12 // =4096
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: cmp sp, x9
; CHECK-NEXT: b.ne .LBB10_1
; CHECK-NEXT: // %bb.2: // %entry
@@ -314,7 +314,7 @@ define void @static_21504(ptr %out) #0 {
; CHECK-NEXT: .LBB11_1: // %entry
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: sub sp, sp, #1, lsl #12 // =4096
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: cmp sp, x9
; CHECK-NEXT: b.ne .LBB11_1
; CHECK-NEXT: // %bb.2: // %entry
@@ -350,14 +350,14 @@ define void @static_21520(ptr %out) #0 {
; CHECK-NEXT: .LBB12_1: // %entry
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: sub sp, sp, #1, lsl #12 // =4096
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: cmp sp, x9
; CHECK-NEXT: b.ne .LBB12_1
; CHECK-NEXT: // %bb.2: // %entry
; CHECK-NEXT: .cfi_def_cfa_register wsp
; CHECK-NEXT: sub sp, sp, #1040
; CHECK-NEXT: .cfi_def_cfa_offset 21536
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
; CHECK-NEXT: add sp, sp, #5, lsl #12 // =20480
@@ -396,7 +396,7 @@ define void @static_16_align_8192(ptr %out) #0 {
; CHECK-NEXT: b.le .LBB13_3
; CHECK-NEXT: // %bb.2: // %entry
; CHECK-NEXT: // in Loop: Header=BB13_1 Depth=1
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: b .LBB13_1
; CHECK-NEXT: .LBB13_3: // %entry
; CHECK-NEXT: mov sp, x9
@@ -429,7 +429,7 @@ define void @static_16_align_2048(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub x9, sp, #2032
; CHECK-NEXT: and sp, x9, #0xfffffffffffff800
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
; CHECK-NEXT: mov sp, x29
@@ -458,7 +458,7 @@ define void @static_2032_align_2048(ptr %out) #0 {
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub x9, sp, #2032
; CHECK-NEXT: and sp, x9, #0xfffffffffffff800
-; CHECK-NEXT: str xzr, [sp]
+; CHECK-NEXT: ldr xzr, [sp]
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
; CHECK-NEXT: mov sp, x29
@@ -485,7 +485,7 @@ define void @static_9232(ptr %out) uwtable(async) {
; CHECK-NEXT: .cfi_def_cfa_offset 8208
; CHECK-NEXT: sub sp, sp, #800
; CHECK-NEXT: .cfi_def_cfa_offset 9008
-; CHECK-NEXT: str xzr, [sp], #-240
+; CHECK-NEXT: ldr xzr, [sp], #-240
; CHECK-NEXT: .cfi_def_cfa_offset 9248
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: str x8, [x0]
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