[llvm] [RISCV] Sources of vmerge shouldn't overlap V0 (PR #170070)

Luke Lau via llvm-commits llvm-commits at lists.llvm.org
Sun Nov 30 22:50:24 PST 2025


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@@ -765,8 +765,9 @@ define <vscale x 8 x i64> @vmerge_xv_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vs
 ; RV32-NEXT:    sw a0, 8(sp)
 ; RV32-NEXT:    sw a1, 12(sp)
 ; RV32-NEXT:    addi a0, sp, 8
-; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
-; RV32-NEXT:    vlse64.v v8, (a0), zero, v0.t
+; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, ma
+; RV32-NEXT:    vlse64.v v16, (a0), zero
+; RV32-NEXT:    vmerge.vvm v8, v8, v16, v0
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lukel97 wrote:

Oh woops I'm just seeing this. I opened up https://github.com/llvm/llvm-project/pull/170077 but I think you can just cherry-pick those commits (5f38ab224a950dfe9aec4ac8dc779c9861d01a09 + 1e826b2faae2c057ea21833fcba7fb27fa733523) into this PR, since the RISCVVectorPeephole changes aren't useful on their own without this PR! 

https://github.com/llvm/llvm-project/pull/170070


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