[llvm] [RISCV] Sources of vmerge shouldn't overlap V0 (PR #170070)
Pengcheng Wang via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 30 22:14:52 PST 2025
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@@ -765,8 +765,9 @@ define <vscale x 8 x i64> @vmerge_xv_nxv8i64(<vscale x 8 x i64> %va, i64 %b, <vs
; RV32-NEXT: sw a0, 8(sp)
; RV32-NEXT: sw a1, 12(sp)
; RV32-NEXT: addi a0, sp, 8
-; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu
-; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t
+; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, ma
+; RV32-NEXT: vlse64.v v16, (a0), zero
+; RV32-NEXT: vmerge.vvm v8, v8, v16, v0
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wangpc-pp wrote:
Or you can take this PR? We should backport this to LLVM 21 Release, it will be easier if we put all the changes in one commit.
https://github.com/llvm/llvm-project/pull/170070
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