[llvm] [PHIElimination] Declare MachineLoopInfo dependency for Legacy PM (PR #169693)
Prasoon Mishra via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 30 08:11:12 PST 2025
https://github.com/PrasoonMishra updated https://github.com/llvm/llvm-project/pull/169693
>From ca10c400ff1b81aded5f29b35eb4c2f93cc54714 Mon Sep 17 00:00:00 2001
From: Prasoon Mishra <Prasoon.Mishra at amd.com>
Date: Tue, 28 Oct 2025 10:00:13 +0000
Subject: [PATCH 1/3] [PHIElimination] Declare MachineLoopInfo as optional
dependency for legacy PM
PHIElimination uses MachineLoopInfo for loop exiting critical edge
splitting but wasn't declaring this dependency via addUsedIfAvailable()
in getAnalysisUsage(). Without this declaration, the pass manager
does not make MachineLoopInfo accessible to PHIElimination, causing
getAnalysisIfAvailable() to return nullptr.
Without MachineLoopInfo, the loop exiting edge optimization doesn't
fire, resulting in fewer critical edge splits and potentially
suboptimal code placement.
This patch adds AU.addUsedIfAvailable<MachineLoopInfoWrapperPass>() to
declare the optional dependency. Adds a test that verifies the
optimization fires when MLI is accessible.
---
llvm/lib/CodeGen/PHIElimination.cpp | 1 +
.../CodeGen/AMDGPU/phi-elim-mli-available.mir | 44 +++++++++++++++++++
2 files changed, 45 insertions(+)
create mode 100644 llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir
diff --git a/llvm/lib/CodeGen/PHIElimination.cpp b/llvm/lib/CodeGen/PHIElimination.cpp
index 34a9d5d0e401f..74e46121e65c7 100644
--- a/llvm/lib/CodeGen/PHIElimination.cpp
+++ b/llvm/lib/CodeGen/PHIElimination.cpp
@@ -201,6 +201,7 @@ INITIALIZE_PASS_END(PHIElimination, DEBUG_TYPE,
void PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addUsedIfAvailable<LiveVariablesWrapperPass>();
+ AU.addUsedIfAvailable<MachineLoopInfoWrapperPass>();
AU.addPreserved<LiveVariablesWrapperPass>();
AU.addPreserved<SlotIndexesWrapperPass>();
AU.addPreserved<LiveIntervalsWrapperPass>();
diff --git a/llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir b/llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir
new file mode 100644
index 0000000000000..90315cae9d34c
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir
@@ -0,0 +1,44 @@
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=machine-loops,livevars,phi-node-elimination -no-phi-elim-live-out-early-exit -stats -filetype=null %s 2>&1 | FileCheck %s
+# REQUIRES: asserts
+
+# Test that PHIElimination accesses MachineLoopInfo if available for
+# loop-aware edge splitting. The -no-phi-elim-live-out-early-exit flag
+# ensures we reach the loop exiting edge optimization code path.
+#
+# CHECK: 2 phi-node-elimination - Number of critical edges split
+
+---
+name: test_loop_exit_edge_split
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $vgpr0, $sgpr0
+ %0:vgpr_32 = COPY $vgpr0
+ %1:sgpr_32 = COPY $sgpr0
+ %2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+ S_BRANCH %bb.1
+
+ bb.1:
+ ; Loop header with PHI (multiple predecessors: bb.0, bb.2)
+ %3:vgpr_32 = PHI %2, %bb.0, %4, %bb.2
+
+ %10:sreg_64_xexec = V_CMP_LT_I32_e64 %3, %1, implicit $exec
+ $vcc = COPY %10
+ S_CBRANCH_VCCNZ %bb.3, implicit $vcc
+ S_BRANCH %bb.2
+
+ bb.2:
+ ; Loop body with two successors
+ %4:vgpr_32 = V_ADD_U32_e64 %3, %0, 0, implicit $exec
+
+ %11:sreg_64_xexec = V_CMP_EQ_U32_e64 %4, %1, implicit $exec
+ $vcc = COPY %11
+ S_CBRANCH_VCCNZ %bb.3, implicit $vcc
+ S_BRANCH %bb.1
+
+ bb.3:
+ ; Exit - PHI with values from both bb.1 and bb.2
+ %5:vgpr_32 = PHI %3, %bb.1, %4, %bb.2
+ $vgpr0 = COPY %5
+ SI_RETURN implicit $vgpr0
+...
>From 268222ea2c4850e3c8d10d1a3175bd10da530141 Mon Sep 17 00:00:00 2001
From: Prasoon Mishra <Prasoon.Mishra at amd.com>
Date: Sun, 30 Nov 2025 15:48:17 +0000
Subject: [PATCH 2/3] Update test to validate MIR
---
.../CodeGen/AMDGPU/phi-elim-mli-available.mir | 47 +++++++++++++++++--
1 file changed, 44 insertions(+), 3 deletions(-)
diff --git a/llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir b/llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir
index 90315cae9d34c..b2f4399e3e468 100644
--- a/llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir
+++ b/llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir
@@ -1,16 +1,57 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=machine-loops,livevars,phi-node-elimination -no-phi-elim-live-out-early-exit -stats -filetype=null %s 2>&1 | FileCheck %s
-# REQUIRES: asserts
# Test that PHIElimination accesses MachineLoopInfo if available for
# loop-aware edge splitting. The -no-phi-elim-live-out-early-exit flag
# ensures we reach the loop exiting edge optimization code path.
-#
-# CHECK: 2 phi-node-elimination - Number of critical edges split
---
name: test_loop_exit_edge_split
tracksRegLiveness: true
body: |
+ ; CHECK-LABEL: name: test_loop_exit_edge_split
+ ; CHECK: bb.0:
+ ; CHECK-NEXT: successors: %bb.1(0x80000000)
+ ; CHECK-NEXT: liveins: $vgpr0, $sgpr0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY killed $sgpr0
+ ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY killed [[V_MOV_B32_e32_]]
+ ; CHECK-NEXT: S_BRANCH %bb.1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY killed [[COPY2]]
+ ; CHECK-NEXT: [[V_CMP_LT_I32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_LT_I32_e64 [[COPY3]], [[COPY1]], implicit $exec
+ ; CHECK-NEXT: $vcc = COPY killed [[V_CMP_LT_I32_e64_]]
+ ; CHECK-NEXT: S_CBRANCH_VCCZ %bb.2, implicit killed $vcc
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.4:
+ ; CHECK-NEXT: successors: %bb.3(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY killed [[COPY3]]
+ ; CHECK-NEXT: S_BRANCH %bb.3
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: successors: %bb.5(0x40000000), %bb.1(0x40000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[COPY3]], [[COPY]], 0, implicit $exec
+ ; CHECK-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[V_ADD_U32_e64_]], [[COPY1]], implicit $exec
+ ; CHECK-NEXT: $vcc = COPY killed [[V_CMP_EQ_U32_e64_]]
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
+ ; CHECK-NEXT: S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.5:
+ ; CHECK-NEXT: successors: %bb.3(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY killed [[V_ADD_U32_e64_]]
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.3:
+ ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY killed [[COPY4]]
+ ; CHECK-NEXT: $vgpr0 = COPY killed [[COPY5]]
+ ; CHECK-NEXT: SI_RETURN implicit killed $vgpr0
bb.0:
liveins: $vgpr0, $sgpr0
%0:vgpr_32 = COPY $vgpr0
>From 7a40049f8d64170cce0f31e37257713a958df8ac Mon Sep 17 00:00:00 2001
From: Prasoon Mishra <Prasoon.Mishra at amd.com>
Date: Sun, 30 Nov 2025 16:09:50 +0000
Subject: [PATCH 3/3] Minor fix.
---
llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir b/llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir
index b2f4399e3e468..82e0490ae5945 100644
--- a/llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir
+++ b/llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=machine-loops,livevars,phi-node-elimination -no-phi-elim-live-out-early-exit -stats -filetype=null %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=machine-loops,livevars,phi-node-elimination -no-phi-elim-live-out-early-exit -filetype=null %s 2>&1 | FileCheck %s
# Test that PHIElimination accesses MachineLoopInfo if available for
# loop-aware edge splitting. The -no-phi-elim-live-out-early-exit flag
More information about the llvm-commits
mailing list