[llvm] [PowerPC] cost modeling for length type VP intrinsic load/store (PR #168938)

[Florian Hahn via llvm-commits]

================
@@ -1078,3 +1082,65 @@ PPCTTIImpl::getVPLegalizationStrategy(const VPIntrinsic &PI) const {
 
   return VPLegalization(VPLegalization::Legal, VPLegalization::Legal);
 }
+
+bool PPCTTIImpl::hasActiveVectorLength() const {
+  unsigned CPU = ST->getCPUDirective();
+  if (!PPCEVL)
+    return false;
+  if (CPU == PPC::DIR_PWR10 || CPU == PPC::DIR_PWR_FUTURE ||
+      (Pwr9EVL && CPU == PPC::DIR_PWR9))
+    return true;
+  return false;
----------------
fhahn wrote:

This could just be
```suggestion
  return CPU == PPC::DIR_PWR10 || CPU == PPC::DIR_PWR_FUTURE ||
      (Pwr9EVL && CPU == PPC::DIR_PWR9);
```

This means vector predication intrinsics are supported? This would need some tests with vp intrinsics, which are different to masked ones used in the tests.


https://github.com/llvm/llvm-project/pull/168938