[llvm] [PowerPC] cost modeling for length type VP intrinsic load/store (PR #168938)

[zhijian lin via llvm-commits]

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@@ -1078,3 +1082,65 @@ PPCTTIImpl::getVPLegalizationStrategy(const VPIntrinsic &PI) const {
 
   return VPLegalization(VPLegalization::Legal, VPLegalization::Legal);
 }
+
+bool PPCTTIImpl::hasActiveVectorLength() const {
+  unsigned CPU = ST->getCPUDirective();
+  if (!PPCEVL)
+    return false;
+  if (CPU == PPC::DIR_PWR10 || CPU == PPC::DIR_PWR_FUTURE ||
+      (Pwr9EVL && CPU == PPC::DIR_PWR9))
+    return true;
+  return false;
+}
+
+bool PPCTTIImpl::isLegalMaskedLoad(Type *DataType, Align Alignment,
+                                   unsigned AddressSpace) const {
+  if (!hasActiveVectorLength())
+    return false;
+  auto IsLegalLoadWithLengthType = [](EVT VT) {
+    if (VT != MVT::i64 && VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8)
+      return false;
+    return true;
+  };
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diggerlin wrote:

nit: add a blank after the line for more readable. 

https://github.com/llvm/llvm-project/pull/168938