[llvm] [AArch64] Improve select dagcombine (PR #169925)

Graham Hunter via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 28 09:26:49 PST 2025


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@@ -26965,6 +26965,11 @@ static SDValue performSelectCombine(SDNode *N,
   if (!ResVT.isVector() || NumMaskElts == 0)
     return SDValue();
 
+  // Avoid creating vectors with excessive VFs for small types.
+  if (DCI.isBeforeLegalize() &&
+      SrcVT.getSizeInBits() < ResVT.getScalarSizeInBits())
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huntergr-arm wrote:

Always using the elementcount of ResVT before legalization does seem to be better, yes. Thanks.

https://github.com/llvm/llvm-project/pull/169925


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