[llvm] a5dba76 - Pre-commit tests for x60 vector ld/st latency PR
Mikhail R. Gadelha via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 28 08:32:50 PST 2025
Author: Mikhail R. Gadelha
Date: 2025-11-28T13:32:12-03:00
New Revision: a5dba76de49220246c2d787d29444ed226fbb472
URL: https://github.com/llvm/llvm-project/commit/a5dba76de49220246c2d787d29444ed226fbb472
DIFF: https://github.com/llvm/llvm-project/commit/a5dba76de49220246c2d787d29444ed226fbb472.diff
LOG: Pre-commit tests for x60 vector ld/st latency PR
Signed-off-by: Mikhail R. Gadelha <mikhail at igalia.com>
Added:
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vle-vse-vlm.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlse-vsse.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlseg-vsseg.s
llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlxe-vsxe.s
Modified:
Removed:
################################################################################
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vle-vse-vlm.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vle-vse-vlm.s
new file mode 100644
index 0000000000000..5209c897698a9
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vle-vse-vlm.s
@@ -0,0 +1,540 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s
+
+vsetvli zero, zero, e8, mf8, ta, ma
+vle8.v v8, (a0)
+vsetvli zero, zero, e8, mf4, ta, ma
+vle8.v v8, (a0)
+vsetvli zero, zero, e8, mf2, ta, ma
+vle8.v v8, (a0)
+vsetvli zero, zero, e8, m1, ta, ma
+vle8.v v8, (a0)
+vsetvli zero, zero, e8, m2, ta, ma
+vle8.v v8, (a0)
+vsetvli zero, zero, e8, m4, ta, ma
+vle8.v v8, (a0)
+vsetvli zero, zero, e8, m8, ta, ma
+vle8.v v8, (a0)
+
+vsetvli zero, zero, e16, mf4, ta, ma
+vle16.v v8, (a0)
+vsetvli zero, zero, e16, mf2, ta, ma
+vle16.v v8, (a0)
+vsetvli zero, zero, e16, m1, ta, ma
+vle16.v v8, (a0)
+vsetvli zero, zero, e16, m2, ta, ma
+vle16.v v8, (a0)
+vsetvli zero, zero, e16, m4, ta, ma
+vle16.v v8, (a0)
+vsetvli zero, zero, e16, m8, ta, ma
+vle16.v v8, (a0)
+
+vsetvli zero, zero, e32, mf2, ta, ma
+vle32.v v8, (a0)
+vsetvli zero, zero, e32, m1, ta, ma
+vle32.v v8, (a0)
+vsetvli zero, zero, e32, m2, ta, ma
+vle32.v v8, (a0)
+vsetvli zero, zero, e32, m4, ta, ma
+vle32.v v8, (a0)
+vsetvli zero, zero, e32, m8, ta, ma
+vle32.v v8, (a0)
+
+vsetvli zero, zero, e64, m1, ta, ma
+vle64.v v8, (a0)
+vsetvli zero, zero, e64, m2, ta, ma
+vle64.v v8, (a0)
+vsetvli zero, zero, e64, m4, ta, ma
+vle64.v v8, (a0)
+vsetvli zero, zero, e64, m8, ta, ma
+vle64.v v8, (a0)
+
+vsetvli zero, zero, e8, mf8, ta, ma
+vse8.v v8, (a0)
+vsetvli zero, zero, e8, mf4, ta, ma
+vse8.v v8, (a0)
+vsetvli zero, zero, e8, mf2, ta, ma
+vse8.v v8, (a0)
+vsetvli zero, zero, e8, m1, ta, ma
+vse8.v v8, (a0)
+vsetvli zero, zero, e8, m2, ta, ma
+vse8.v v8, (a0)
+vsetvli zero, zero, e8, m4, ta, ma
+vse8.v v8, (a0)
+vsetvli zero, zero, e8, m8, ta, ma
+vse8.v v8, (a0)
+
+vsetvli zero, zero, e16, mf4, ta, ma
+vse16.v v8, (a0)
+vsetvli zero, zero, e16, mf2, ta, ma
+vse16.v v8, (a0)
+vsetvli zero, zero, e16, m1, ta, ma
+vse16.v v8, (a0)
+vsetvli zero, zero, e16, m2, ta, ma
+vse16.v v8, (a0)
+vsetvli zero, zero, e16, m4, ta, ma
+vse16.v v8, (a0)
+vsetvli zero, zero, e16, m8, ta, ma
+vse16.v v8, (a0)
+
+vsetvli zero, zero, e32, mf2, ta, ma
+vse32.v v8, (a0)
+vsetvli zero, zero, e32, m1, ta, ma
+vse32.v v8, (a0)
+vsetvli zero, zero, e32, m2, ta, ma
+vse32.v v8, (a0)
+vsetvli zero, zero, e32, m4, ta, ma
+vse32.v v8, (a0)
+vsetvli zero, zero, e32, m8, ta, ma
+vse32.v v8, (a0)
+
+vsetvli zero, zero, e64, m1, ta, ma
+vse64.v v8, (a0)
+vsetvli zero, zero, e64, m2, ta, ma
+vse64.v v8, (a0)
+vsetvli zero, zero, e64, m4, ta, ma
+vse64.v v8, (a0)
+vsetvli zero, zero, e64, m8, ta, ma
+vse64.v v8, (a0)
+
+# Unit-stride mask load/store
+
+vsetvli zero, zero, e8, mf8, ta, ma
+vlm.v v8, (a0)
+vsetvli zero, zero, e8, mf4, ta, ma
+vlm.v v8, (a0)
+vsetvli zero, zero, e8, mf2, ta, ma
+vlm.v v8, (a0)
+vsetvli zero, zero, e8, m1, ta, ma
+vlm.v v8, (a0)
+vsetvli zero, zero, e8, m2, ta, ma
+vlm.v v8, (a0)
+vsetvli zero, zero, e8, m4, ta, ma
+vlm.v v8, (a0)
+vsetvli zero, zero, e8, m8, ta, ma
+vlm.v v8, (a0)
+
+vsetvli zero, zero, e8, mf8, ta, ma
+vsm.v v8, (a0)
+vsetvli zero, zero, e8, mf4, ta, ma
+vsm.v v8, (a0)
+vsetvli zero, zero, e8, mf2, ta, ma
+vsm.v v8, (a0)
+vsetvli zero, zero, e8, m1, ta, ma
+vsm.v v8, (a0)
+vsetvli zero, zero, e8, m2, ta, ma
+vsm.v v8, (a0)
+vsetvli zero, zero, e8, m4, ta, ma
+vsm.v v8, (a0)
+vsetvli zero, zero, e8, m8, ta, ma
+vsm.v v8, (a0)
+
+# Fault-only-first
+
+vsetvli zero, zero, e8, mf8, ta, ma
+vle8ff.v v8, (a0)
+vsetvli zero, zero, e8, mf4, ta, ma
+vle8ff.v v8, (a0)
+vsetvli zero, zero, e8, mf2, ta, ma
+vle8ff.v v8, (a0)
+vsetvli zero, zero, e8, m1, ta, ma
+vle8ff.v v8, (a0)
+vsetvli zero, zero, e8, m2, ta, ma
+vle8ff.v v8, (a0)
+vsetvli zero, zero, e8, m4, ta, ma
+vle8ff.v v8, (a0)
+vsetvli zero, zero, e8, m8, ta, ma
+vle8ff.v v8, (a0)
+
+vsetvli zero, zero, e16, mf4, ta, ma
+vle16ff.v v8, (a0)
+vsetvli zero, zero, e16, mf2, ta, ma
+vle16ff.v v8, (a0)
+vsetvli zero, zero, e16, m1, ta, ma
+vle16ff.v v8, (a0)
+vsetvli zero, zero, e16, m2, ta, ma
+vle16ff.v v8, (a0)
+vsetvli zero, zero, e16, m4, ta, ma
+vle16ff.v v8, (a0)
+vsetvli zero, zero, e16, m8, ta, ma
+vle16ff.v v8, (a0)
+
+vsetvli zero, zero, e32, mf2, ta, ma
+vle32ff.v v8, (a0)
+vsetvli zero, zero, e32, m1, ta, ma
+vle32ff.v v8, (a0)
+vsetvli zero, zero, e32, m2, ta, ma
+vle32ff.v v8, (a0)
+vsetvli zero, zero, e32, m4, ta, ma
+vle32ff.v v8, (a0)
+vsetvli zero, zero, e32, m8, ta, ma
+vle32ff.v v8, (a0)
+
+vsetvli zero, zero, e64, m1, ta, ma
+vle64ff.v v8, (a0)
+vsetvli zero, zero, e64, m2, ta, ma
+vle64ff.v v8, (a0)
+vsetvli zero, zero, e64, m4, ta, ma
+vle64ff.v v8, (a0)
+vsetvli zero, zero, e64, m8, ta, ma
+vle64ff.v v8, (a0)
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP:1
+# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
+# CHECK-NEXT: [2] - SMX60_IEUA:1
+# CHECK-NEXT: [3] - SMX60_IEUB:1
+# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+# CHECK-NEXT: [7]: Bypass Latency
+# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
+# CHECK-NEXT: [9]: LLVM Opcode Name
+
+# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE8_V vle8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE8_V vle8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE8_V vle8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE8_V vle8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE8_V vle8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE8_V vle8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE8_V vle8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE16_V vle16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE16_V vle16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE16_V vle16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE16_V vle16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE16_V vle16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE16_V vle16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE32_V vle32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE32_V vle32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE32_V vle32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE32_V vle32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE32_V vle32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE64_V vle64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE64_V vle64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE64_V vle64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE64_V vle64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE8_V vse8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE8_V vse8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE8_V vse8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE8_V vse8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE8_V vse8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE8_V vse8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE8_V vse8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE16_V vse16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE16_V vse16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE16_V vse16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE16_V vse16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE16_V vse16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE16_V vse16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE32_V vse32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE32_V vse32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE32_V vse32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE32_V vse32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE32_V vse32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE64_V vse64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE64_V vse64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE64_V vse64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSE64_V vse64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLM_V vlm.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLM_V vlm.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLM_V vlm.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLM_V vlm.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLM_V vlm.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLM_V vlm.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLM_V vlm.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSM_V vsm.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSM_V vsm.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSM_V vsm.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSM_V vsm.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSM_V vsm.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSM_V vsm.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSM_V vsm.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE8FF_V vle8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE8FF_V vle8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE8FF_V vle8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE8FF_V vle8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE8FF_V vle8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE8FF_V vle8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE8FF_V vle8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE16FF_V vle16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE16FF_V vle16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE16FF_V vle16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE16FF_V vle16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE16FF_V vle16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE16FF_V vle16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE32FF_V vle32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE32FF_V vle32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE32FF_V vle32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE32FF_V vle32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE32FF_V vle32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE64FF_V vle64ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE64FF_V vle64ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE64FF_V vle64ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLE64FF_V vle64ff.v v8, (a0)
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP
+# CHECK-NEXT: [1] - SMX60_IEUA
+# CHECK-NEXT: [2] - SMX60_IEUB
+# CHECK-NEXT: [3.0] - SMX60_LS
+# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 80.00 - - - - - 80.00
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vse64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlm.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlm.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlm.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlm.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlm.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlm.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlm.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsm.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsm.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsm.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsm.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsm.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsm.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsm.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle8ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle8ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle8ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle8ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle8ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle8ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle8ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle16ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle16ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle16ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle16ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle16ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle16ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle32ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle32ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle32ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle32ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle32ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle64ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle64ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle64ff.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vle64ff.v v8, (a0)
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlse-vsse.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlse-vsse.s
new file mode 100644
index 0000000000000..dfd7da53f0b7d
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlse-vsse.s
@@ -0,0 +1,314 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s
+
+vsetvli zero, zero, e8, mf8, ta, ma
+vlse8.v v8, (a0), t0
+vsetvli zero, zero, e8, mf4, ta, ma
+vlse8.v v8, (a0), t0
+vsetvli zero, zero, e8, mf2, ta, ma
+vlse8.v v8, (a0), t0
+vsetvli zero, zero, e8, m1, ta, ma
+vlse8.v v8, (a0), t0
+vsetvli zero, zero, e8, m2, ta, ma
+vlse8.v v8, (a0), t0
+vsetvli zero, zero, e8, m4, ta, ma
+vlse8.v v8, (a0), t0
+vsetvli zero, zero, e8, m8, ta, ma
+vlse8.v v8, (a0), t0
+
+vsetvli zero, zero, e16, mf4, ta, ma
+vlse16.v v8, (a0), t0
+vsetvli zero, zero, e16, mf2, ta, ma
+vlse16.v v8, (a0), t0
+vsetvli zero, zero, e16, m1, ta, ma
+vlse16.v v8, (a0), t0
+vsetvli zero, zero, e16, m2, ta, ma
+vlse16.v v8, (a0), t0
+vsetvli zero, zero, e16, m4, ta, ma
+vlse16.v v8, (a0), t0
+vsetvli zero, zero, e16, m8, ta, ma
+vlse16.v v8, (a0), t0
+
+vsetvli zero, zero, e32, mf2, ta, ma
+vlse32.v v8, (a0), t0
+vsetvli zero, zero, e32, m1, ta, ma
+vlse32.v v8, (a0), t0
+vsetvli zero, zero, e32, m2, ta, ma
+vlse32.v v8, (a0), t0
+vsetvli zero, zero, e32, m4, ta, ma
+vlse32.v v8, (a0), t0
+vsetvli zero, zero, e32, m8, ta, ma
+vlse32.v v8, (a0), t0
+
+vsetvli zero, zero, e64, m1, ta, ma
+vlse64.v v8, (a0), t0
+vsetvli zero, zero, e64, m2, ta, ma
+vlse64.v v8, (a0), t0
+vsetvli zero, zero, e64, m4, ta, ma
+vlse64.v v8, (a0), t0
+vsetvli zero, zero, e64, m8, ta, ma
+vlse64.v v8, (a0), t0
+
+vsetvli zero, zero, e8, mf8, ta, ma
+vsse8.v v8, (a0), t0
+vsetvli zero, zero, e8, mf4, ta, ma
+vsse8.v v8, (a0), t0
+vsetvli zero, zero, e8, mf2, ta, ma
+vsse8.v v8, (a0), t0
+vsetvli zero, zero, e8, m1, ta, ma
+vsse8.v v8, (a0), t0
+vsetvli zero, zero, e8, m2, ta, ma
+vsse8.v v8, (a0), t0
+vsetvli zero, zero, e8, m4, ta, ma
+vsse8.v v8, (a0), t0
+vsetvli zero, zero, e8, m8, ta, ma
+vsse8.v v8, (a0), t0
+
+vsetvli zero, zero, e16, mf4, ta, ma
+vsse16.v v8, (a0), t0
+vsetvli zero, zero, e16, mf2, ta, ma
+vsse16.v v8, (a0), t0
+vsetvli zero, zero, e16, m1, ta, ma
+vsse16.v v8, (a0), t0
+vsetvli zero, zero, e16, m2, ta, ma
+vsse16.v v8, (a0), t0
+vsetvli zero, zero, e16, m4, ta, ma
+vsse16.v v8, (a0), t0
+vsetvli zero, zero, e16, m8, ta, ma
+vsse16.v v8, (a0), t0
+
+vsetvli zero, zero, e32, mf2, ta, ma
+vsse32.v v8, (a0), t0
+vsetvli zero, zero, e32, m1, ta, ma
+vsse32.v v8, (a0), t0
+vsetvli zero, zero, e32, m2, ta, ma
+vsse32.v v8, (a0), t0
+vsetvli zero, zero, e32, m4, ta, ma
+vsse32.v v8, (a0), t0
+vsetvli zero, zero, e32, m8, ta, ma
+vsse32.v v8, (a0), t0
+
+vsetvli zero, zero, e64, m1, ta, ma
+vsse64.v v8, (a0), t0
+vsetvli zero, zero, e64, m2, ta, ma
+vsse64.v v8, (a0), t0
+vsetvli zero, zero, e64, m4, ta, ma
+vsse64.v v8, (a0), t0
+vsetvli zero, zero, e64, m8, ta, ma
+vsse64.v v8, (a0), t0
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP:1
+# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
+# CHECK-NEXT: [2] - SMX60_IEUA:1
+# CHECK-NEXT: [3] - SMX60_IEUB:1
+# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+# CHECK-NEXT: [7]: Bypass Latency
+# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
+# CHECK-NEXT: [9]: LLVM Opcode Name
+
+# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE8_V vlse8.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE8_V vlse8.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE8_V vlse8.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE8_V vlse8.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE8_V vlse8.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE8_V vlse8.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE8_V vlse8.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE16_V vlse16.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE16_V vlse16.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE16_V vlse16.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE16_V vlse16.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE16_V vlse16.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE16_V vlse16.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE32_V vlse32.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE32_V vlse32.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE32_V vlse32.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE32_V vlse32.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE32_V vlse32.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE64_V vlse64.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE64_V vlse64.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE64_V vlse64.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSE64_V vlse64.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE8_V vsse8.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE8_V vsse8.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE8_V vsse8.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE8_V vsse8.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE8_V vsse8.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE8_V vsse8.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE8_V vsse8.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE16_V vsse16.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE16_V vsse16.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE16_V vsse16.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE16_V vsse16.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE16_V vsse16.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE16_V vsse16.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE32_V vsse32.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE32_V vsse32.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE32_V vsse32.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE32_V vsse32.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE32_V vsse32.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE64_V vsse64.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE64_V vsse64.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE64_V vsse64.v v8, (a0), t0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSE64_V vsse64.v v8, (a0), t0
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP
+# CHECK-NEXT: [1] - SMX60_IEUA
+# CHECK-NEXT: [2] - SMX60_IEUB
+# CHECK-NEXT: [3.0] - SMX60_LS
+# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 44.00 - - - - - 44.00
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse8.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse8.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse8.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse8.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse8.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse8.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse8.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse16.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse16.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse16.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse16.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse16.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse16.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse32.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse32.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse32.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse32.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse32.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse64.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse64.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse64.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vlse64.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse8.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse8.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse8.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse8.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse8.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse8.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse8.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse16.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse16.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse16.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse16.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse16.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse16.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse32.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse32.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse32.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse32.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse32.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse64.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse64.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse64.v v8, (a0), t0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsse64.v v8, (a0), t0
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlseg-vsseg.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlseg-vsseg.s
new file mode 100644
index 0000000000000..6ad505e3c741d
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlseg-vsseg.s
@@ -0,0 +1,4725 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vlseg2e8.v v8,(a0)
+vsetvli zero, zero, e8, mf4, tu, mu
+vlseg2e8.v v8,(a0)
+vsetvli zero, zero, e8, mf2, tu, mu
+vlseg2e8.v v8,(a0)
+vsetvli zero, zero, e8, m1, tu, mu
+vlseg2e8.v v8,(a0)
+vsetvli zero, zero, e8, m2, tu, mu
+vlseg2e8.v v8,(a0)
+vsetvli zero, zero, e8, m4, tu, mu
+vlseg2e8.v v8,(a0)
+vsetvli zero, zero, e16, mf4, tu, mu
+vlseg2e16.v v8,(a0)
+vsetvli zero, zero, e16, mf2, tu, mu
+vlseg2e16.v v8,(a0)
+vsetvli zero, zero, e16, m1, tu, mu
+vlseg2e16.v v8,(a0)
+vsetvli zero, zero, e16, m2, tu, mu
+vlseg2e16.v v8,(a0)
+vsetvli zero, zero, e16, m4, tu, mu
+vlseg2e16.v v8,(a0)
+vsetvli zero, zero, e32, mf2, tu, mu
+vlseg2e32.v v8,(a0)
+vsetvli zero, zero, e32, m1, tu, mu
+vlseg2e32.v v8,(a0)
+vsetvli zero, zero, e32, m2, tu, mu
+vlseg2e32.v v8,(a0)
+vsetvli zero, zero, e32, m4, tu, mu
+vlseg2e32.v v8,(a0)
+vsetvli zero, zero, e64, m1, tu, mu
+vlseg2e64.v v8,(a0)
+vsetvli zero, zero, e64, m2, tu, mu
+vlseg2e64.v v8,(a0)
+vsetvli zero, zero, e64, m4, tu, mu
+vlseg2e64.v v8,(a0)
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vlseg3e8.v v8,(a0)
+vsetvli zero, zero, e8, mf4, tu, mu
+vlseg3e8.v v8,(a0)
+vsetvli zero, zero, e8, mf2, tu, mu
+vlseg3e8.v v8,(a0)
+vsetvli zero, zero, e8, m1, tu, mu
+vlseg3e8.v v8,(a0)
+vsetvli zero, zero, e8, m2, tu, mu
+vlseg3e8.v v8,(a0)
+vsetvli zero, zero, e16, mf4, tu, mu
+vlseg3e16.v v8,(a0)
+vsetvli zero, zero, e16, mf2, tu, mu
+vlseg3e16.v v8,(a0)
+vsetvli zero, zero, e16, m1, tu, mu
+vlseg3e16.v v8,(a0)
+vsetvli zero, zero, e16, m2, tu, mu
+vlseg3e16.v v8,(a0)
+vsetvli zero, zero, e32, mf2, tu, mu
+vlseg3e32.v v8,(a0)
+vsetvli zero, zero, e32, m1, tu, mu
+vlseg3e32.v v8,(a0)
+vsetvli zero, zero, e32, m2, tu, mu
+vlseg3e32.v v8,(a0)
+vsetvli zero, zero, e64, m1, tu, mu
+vlseg3e64.v v8,(a0)
+vsetvli zero, zero, e64, m2, tu, mu
+vlseg3e64.v v8,(a0)
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vlseg4e8.v v8,(a0)
+vsetvli zero, zero, e8, mf4, tu, mu
+vlseg4e8.v v8,(a0)
+vsetvli zero, zero, e8, mf2, tu, mu
+vlseg4e8.v v8,(a0)
+vsetvli zero, zero, e8, m1, tu, mu
+vlseg4e8.v v8,(a0)
+vsetvli zero, zero, e8, m2, tu, mu
+vlseg4e8.v v8,(a0)
+vsetvli zero, zero, e16, mf4, tu, mu
+vlseg4e16.v v8,(a0)
+vsetvli zero, zero, e16, mf2, tu, mu
+vlseg4e16.v v8,(a0)
+vsetvli zero, zero, e16, m1, tu, mu
+vlseg4e16.v v8,(a0)
+vsetvli zero, zero, e16, m2, tu, mu
+vlseg4e16.v v8,(a0)
+vsetvli zero, zero, e32, mf2, tu, mu
+vlseg4e32.v v8,(a0)
+vsetvli zero, zero, e32, m1, tu, mu
+vlseg4e32.v v8,(a0)
+vsetvli zero, zero, e32, m2, tu, mu
+vlseg4e32.v v8,(a0)
+vsetvli zero, zero, e64, m1, tu, mu
+vlseg4e64.v v8,(a0)
+vsetvli zero, zero, e64, m2, tu, mu
+vlseg4e64.v v8,(a0)
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vlseg5e8.v v8,(a0)
+vsetvli zero, zero, e8, mf4, tu, mu
+vlseg5e8.v v8,(a0)
+vsetvli zero, zero, e8, mf2, tu, mu
+vlseg5e8.v v8,(a0)
+vsetvli zero, zero, e8, m1, tu, mu
+vlseg5e8.v v8,(a0)
+vsetvli zero, zero, e16, mf4, tu, mu
+vlseg5e16.v v8,(a0)
+vsetvli zero, zero, e16, mf2, tu, mu
+vlseg5e16.v v8,(a0)
+vsetvli zero, zero, e16, m1, tu, mu
+vlseg5e16.v v8,(a0)
+vsetvli zero, zero, e32, mf2, tu, mu
+vlseg5e32.v v8,(a0)
+vsetvli zero, zero, e32, m1, tu, mu
+vlseg5e32.v v8,(a0)
+vsetvli zero, zero, e64, m1, tu, mu
+vlseg5e64.v v8,(a0)
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vlseg6e8.v v8,(a0)
+vsetvli zero, zero, e8, mf4, tu, mu
+vlseg6e8.v v8,(a0)
+vsetvli zero, zero, e8, mf2, tu, mu
+vlseg6e8.v v8,(a0)
+vsetvli zero, zero, e8, m1, tu, mu
+vlseg6e8.v v8,(a0)
+vsetvli zero, zero, e16, mf4, tu, mu
+vlseg6e16.v v8,(a0)
+vsetvli zero, zero, e16, mf2, tu, mu
+vlseg6e16.v v8,(a0)
+vsetvli zero, zero, e16, m1, tu, mu
+vlseg6e16.v v8,(a0)
+vsetvli zero, zero, e32, mf2, tu, mu
+vlseg6e32.v v8,(a0)
+vsetvli zero, zero, e32, m1, tu, mu
+vlseg6e32.v v8,(a0)
+vsetvli zero, zero, e64, m1, tu, mu
+vlseg6e64.v v8,(a0)
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vlseg7e8.v v8,(a0)
+vsetvli zero, zero, e8, mf4, tu, mu
+vlseg7e8.v v8,(a0)
+vsetvli zero, zero, e8, mf2, tu, mu
+vlseg7e8.v v8,(a0)
+vsetvli zero, zero, e8, m1, tu, mu
+vlseg7e8.v v8,(a0)
+vsetvli zero, zero, e16, mf4, tu, mu
+vlseg7e16.v v8,(a0)
+vsetvli zero, zero, e16, mf2, tu, mu
+vlseg7e16.v v8,(a0)
+vsetvli zero, zero, e16, m1, tu, mu
+vlseg7e16.v v8,(a0)
+vsetvli zero, zero, e32, mf2, tu, mu
+vlseg7e32.v v8,(a0)
+vsetvli zero, zero, e32, m1, tu, mu
+vlseg7e32.v v8,(a0)
+vsetvli zero, zero, e64, m1, tu, mu
+vlseg7e64.v v8,(a0)
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vlseg8e8.v v8,(a0)
+vsetvli zero, zero, e8, mf4, tu, mu
+vlseg8e8.v v8,(a0)
+vsetvli zero, zero, e8, mf2, tu, mu
+vlseg8e8.v v8,(a0)
+vsetvli zero, zero, e8, m1, tu, mu
+vlseg8e8.v v8,(a0)
+vsetvli zero, zero, e16, mf4, tu, mu
+vlseg8e16.v v8,(a0)
+vsetvli zero, zero, e16, mf2, tu, mu
+vlseg8e16.v v8,(a0)
+vsetvli zero, zero, e16, m1, tu, mu
+vlseg8e16.v v8,(a0)
+vsetvli zero, zero, e32, mf2, tu, mu
+vlseg8e32.v v8,(a0)
+vsetvli zero, zero, e32, m1, tu, mu
+vlseg8e32.v v8,(a0)
+vsetvli zero, zero, e64, m1, tu, mu
+vlseg8e64.v v8,(a0)
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsseg2e8.v v8,(a0)
+vsetvli zero, zero, e8, mf4, tu, mu
+vsseg2e8.v v8,(a0)
+vsetvli zero, zero, e8, mf2, tu, mu
+vsseg2e8.v v8,(a0)
+vsetvli zero, zero, e8, m1, tu, mu
+vsseg2e8.v v8,(a0)
+vsetvli zero, zero, e8, m2, tu, mu
+vsseg2e8.v v8,(a0)
+vsetvli zero, zero, e8, m4, tu, mu
+vsseg2e8.v v8,(a0)
+vsetvli zero, zero, e16, mf4, tu, mu
+vsseg2e16.v v8,(a0)
+vsetvli zero, zero, e16, mf2, tu, mu
+vsseg2e16.v v8,(a0)
+vsetvli zero, zero, e16, m1, tu, mu
+vsseg2e16.v v8,(a0)
+vsetvli zero, zero, e16, m2, tu, mu
+vsseg2e16.v v8,(a0)
+vsetvli zero, zero, e16, m4, tu, mu
+vsseg2e16.v v8,(a0)
+vsetvli zero, zero, e32, mf2, tu, mu
+vsseg2e32.v v8,(a0)
+vsetvli zero, zero, e32, m1, tu, mu
+vsseg2e32.v v8,(a0)
+vsetvli zero, zero, e32, m2, tu, mu
+vsseg2e32.v v8,(a0)
+vsetvli zero, zero, e32, m4, tu, mu
+vsseg2e32.v v8,(a0)
+vsetvli zero, zero, e64, m1, tu, mu
+vsseg2e64.v v8,(a0)
+vsetvli zero, zero, e64, m2, tu, mu
+vsseg2e64.v v8,(a0)
+vsetvli zero, zero, e64, m4, tu, mu
+vsseg2e64.v v8,(a0)
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsseg3e8.v v8,(a0)
+vsetvli zero, zero, e8, mf4, tu, mu
+vsseg3e8.v v8,(a0)
+vsetvli zero, zero, e8, mf2, tu, mu
+vsseg3e8.v v8,(a0)
+vsetvli zero, zero, e8, m1, tu, mu
+vsseg3e8.v v8,(a0)
+vsetvli zero, zero, e8, m2, tu, mu
+vsseg3e8.v v8,(a0)
+vsetvli zero, zero, e16, mf4, tu, mu
+vsseg3e16.v v8,(a0)
+vsetvli zero, zero, e16, mf2, tu, mu
+vsseg3e16.v v8,(a0)
+vsetvli zero, zero, e16, m1, tu, mu
+vsseg3e16.v v8,(a0)
+vsetvli zero, zero, e16, m2, tu, mu
+vsseg3e16.v v8,(a0)
+vsetvli zero, zero, e32, mf2, tu, mu
+vsseg3e32.v v8,(a0)
+vsetvli zero, zero, e32, m1, tu, mu
+vsseg3e32.v v8,(a0)
+vsetvli zero, zero, e32, m2, tu, mu
+vsseg3e32.v v8,(a0)
+vsetvli zero, zero, e64, m1, tu, mu
+vsseg3e64.v v8,(a0)
+vsetvli zero, zero, e64, m2, tu, mu
+vsseg3e64.v v8,(a0)
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsseg4e8.v v8,(a0)
+vsetvli zero, zero, e8, mf4, tu, mu
+vsseg4e8.v v8,(a0)
+vsetvli zero, zero, e8, mf2, tu, mu
+vsseg4e8.v v8,(a0)
+vsetvli zero, zero, e8, m1, tu, mu
+vsseg4e8.v v8,(a0)
+vsetvli zero, zero, e8, m2, tu, mu
+vsseg4e8.v v8,(a0)
+vsetvli zero, zero, e16, mf4, tu, mu
+vsseg4e16.v v8,(a0)
+vsetvli zero, zero, e16, mf2, tu, mu
+vsseg4e16.v v8,(a0)
+vsetvli zero, zero, e16, m1, tu, mu
+vsseg4e16.v v8,(a0)
+vsetvli zero, zero, e16, m2, tu, mu
+vsseg4e16.v v8,(a0)
+vsetvli zero, zero, e32, mf2, tu, mu
+vsseg4e32.v v8,(a0)
+vsetvli zero, zero, e32, m1, tu, mu
+vsseg4e32.v v8,(a0)
+vsetvli zero, zero, e32, m2, tu, mu
+vsseg4e32.v v8,(a0)
+vsetvli zero, zero, e64, m1, tu, mu
+vsseg4e64.v v8,(a0)
+vsetvli zero, zero, e64, m2, tu, mu
+vsseg4e64.v v8,(a0)
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsseg5e8.v v8,(a0)
+vsetvli zero, zero, e8, mf4, tu, mu
+vsseg5e8.v v8,(a0)
+vsetvli zero, zero, e8, mf2, tu, mu
+vsseg5e8.v v8,(a0)
+vsetvli zero, zero, e8, m1, tu, mu
+vsseg5e8.v v8,(a0)
+vsetvli zero, zero, e16, mf4, tu, mu
+vsseg5e16.v v8,(a0)
+vsetvli zero, zero, e16, mf2, tu, mu
+vsseg5e16.v v8,(a0)
+vsetvli zero, zero, e16, m1, tu, mu
+vsseg5e16.v v8,(a0)
+vsetvli zero, zero, e32, mf2, tu, mu
+vsseg5e32.v v8,(a0)
+vsetvli zero, zero, e32, m1, tu, mu
+vsseg5e32.v v8,(a0)
+vsetvli zero, zero, e64, m1, tu, mu
+vsseg5e64.v v8,(a0)
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsseg6e8.v v8,(a0)
+vsetvli zero, zero, e8, mf4, tu, mu
+vsseg6e8.v v8,(a0)
+vsetvli zero, zero, e8, mf2, tu, mu
+vsseg6e8.v v8,(a0)
+vsetvli zero, zero, e8, m1, tu, mu
+vsseg6e8.v v8,(a0)
+vsetvli zero, zero, e16, mf4, tu, mu
+vsseg6e16.v v8,(a0)
+vsetvli zero, zero, e16, mf2, tu, mu
+vsseg6e16.v v8,(a0)
+vsetvli zero, zero, e16, m1, tu, mu
+vsseg6e16.v v8,(a0)
+vsetvli zero, zero, e32, mf2, tu, mu
+vsseg6e32.v v8,(a0)
+vsetvli zero, zero, e32, m1, tu, mu
+vsseg6e32.v v8,(a0)
+vsetvli zero, zero, e64, m1, tu, mu
+vsseg6e64.v v8,(a0)
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsseg7e8.v v8,(a0)
+vsetvli zero, zero, e8, mf4, tu, mu
+vsseg7e8.v v8,(a0)
+vsetvli zero, zero, e8, mf2, tu, mu
+vsseg7e8.v v8,(a0)
+vsetvli zero, zero, e8, m1, tu, mu
+vsseg7e8.v v8,(a0)
+vsetvli zero, zero, e16, mf4, tu, mu
+vsseg7e16.v v8,(a0)
+vsetvli zero, zero, e16, mf2, tu, mu
+vsseg7e16.v v8,(a0)
+vsetvli zero, zero, e16, m1, tu, mu
+vsseg7e16.v v8,(a0)
+vsetvli zero, zero, e32, mf2, tu, mu
+vsseg7e32.v v8,(a0)
+vsetvli zero, zero, e32, m1, tu, mu
+vsseg7e32.v v8,(a0)
+vsetvli zero, zero, e64, m1, tu, mu
+vsseg7e64.v v8,(a0)
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsseg8e8.v v8,(a0)
+vsetvli zero, zero, e8, mf4, tu, mu
+vsseg8e8.v v8,(a0)
+vsetvli zero, zero, e8, mf2, tu, mu
+vsseg8e8.v v8,(a0)
+vsetvli zero, zero, e8, m1, tu, mu
+vsseg8e8.v v8,(a0)
+vsetvli zero, zero, e16, mf4, tu, mu
+vsseg8e16.v v8,(a0)
+vsetvli zero, zero, e16, mf2, tu, mu
+vsseg8e16.v v8,(a0)
+vsetvli zero, zero, e16, m1, tu, mu
+vsseg8e16.v v8,(a0)
+vsetvli zero, zero, e32, mf2, tu, mu
+vsseg8e32.v v8,(a0)
+vsetvli zero, zero, e32, m1, tu, mu
+vsseg8e32.v v8,(a0)
+vsetvli zero, zero, e64, m1, tu, mu
+vsseg8e64.v v8,(a0)
+
+vsetvli zero, zero, e8, mf8, tu, mu
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+vsetvli zero, zero, e32, mf2, tu, mu
+vloxseg6ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vloxseg6ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vloxseg6ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vloxseg7ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vloxseg7ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vloxseg7ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vloxseg7ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vloxseg7ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vloxseg7ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vloxseg7ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vloxseg7ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vloxseg7ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vloxseg7ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vloxseg8ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vloxseg8ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vloxseg8ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vloxseg8ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vloxseg8ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vloxseg8ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vloxseg8ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vloxseg8ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vloxseg8ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vloxseg8ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsuxseg2ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vsuxseg2ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vsuxseg2ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vsuxseg2ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m2, tu, mu
+vsuxseg2ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vsuxseg2ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vsuxseg2ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vsuxseg2ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m2, tu, mu
+vsuxseg2ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vsuxseg2ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vsuxseg2ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m2, tu, mu
+vsuxseg2ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vsuxseg2ei64.v v8, (a0), v16
+vsetvli zero, zero, e64, m2, tu, mu
+vsuxseg2ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsuxseg3ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vsuxseg3ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vsuxseg3ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vsuxseg3ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m2, tu, mu
+vsuxseg3ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vsuxseg3ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vsuxseg3ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vsuxseg3ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m2, tu, mu
+vsuxseg3ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vsuxseg3ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vsuxseg3ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m2, tu, mu
+vsuxseg3ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vsuxseg3ei64.v v8, (a0), v16
+vsetvli zero, zero, e64, m2, tu, mu
+vsuxseg3ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsuxseg4ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vsuxseg4ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vsuxseg4ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vsuxseg4ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m2, tu, mu
+vsuxseg4ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vsuxseg4ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vsuxseg4ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vsuxseg4ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m2, tu, mu
+vsuxseg4ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vsuxseg4ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vsuxseg4ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m2, tu, mu
+vsuxseg4ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vsuxseg4ei64.v v8, (a0), v16
+vsetvli zero, zero, e64, m2, tu, mu
+vsuxseg4ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsuxseg5ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vsuxseg5ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vsuxseg5ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vsuxseg5ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vsuxseg5ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vsuxseg5ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vsuxseg5ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vsuxseg5ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vsuxseg5ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vsuxseg5ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsuxseg6ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vsuxseg6ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vsuxseg6ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vsuxseg6ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vsuxseg6ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vsuxseg6ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vsuxseg6ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vsuxseg6ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vsuxseg6ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vsuxseg6ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsuxseg7ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vsuxseg7ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vsuxseg7ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vsuxseg7ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vsuxseg7ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vsuxseg7ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vsuxseg7ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vsuxseg7ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vsuxseg7ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vsuxseg7ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsuxseg8ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vsuxseg8ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vsuxseg8ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vsuxseg8ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vsuxseg8ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vsuxseg8ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vsuxseg8ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vsuxseg8ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vsuxseg8ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vsuxseg8ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsoxseg2ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vsoxseg2ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vsoxseg2ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vsoxseg2ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m2, tu, mu
+vsoxseg2ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m4, tu, mu
+vsoxseg2ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vsoxseg2ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vsoxseg2ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vsoxseg2ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m2, tu, mu
+vsoxseg2ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m4, tu, mu
+vsoxseg2ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vsoxseg2ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vsoxseg2ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m2, tu, mu
+vsoxseg2ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m4, tu, mu
+vsoxseg2ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vsoxseg2ei64.v v8, (a0), v16
+vsetvli zero, zero, e64, m2, tu, mu
+vsoxseg2ei64.v v8, (a0), v16
+vsetvli zero, zero, e64, m4, tu, mu
+vsoxseg2ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsoxseg3ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vsoxseg3ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vsoxseg3ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vsoxseg3ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m2, tu, mu
+vsoxseg3ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vsoxseg3ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vsoxseg3ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vsoxseg3ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m2, tu, mu
+vsoxseg3ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vsoxseg3ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vsoxseg3ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m2, tu, mu
+vsoxseg3ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vsoxseg3ei64.v v8, (a0), v16
+vsetvli zero, zero, e64, m2, tu, mu
+vsoxseg3ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsoxseg4ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vsoxseg4ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vsoxseg4ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vsoxseg4ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m2, tu, mu
+vsoxseg4ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vsoxseg4ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vsoxseg4ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vsoxseg4ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m2, tu, mu
+vsoxseg4ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vsoxseg4ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vsoxseg4ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m2, tu, mu
+vsoxseg4ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vsoxseg4ei64.v v8, (a0), v16
+vsetvli zero, zero, e64, m2, tu, mu
+vsoxseg4ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsoxseg5ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vsoxseg5ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vsoxseg5ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vsoxseg5ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vsoxseg5ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vsoxseg5ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vsoxseg5ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vsoxseg5ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vsoxseg5ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vsoxseg5ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsoxseg6ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vsoxseg6ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vsoxseg6ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vsoxseg6ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vsoxseg6ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vsoxseg6ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vsoxseg6ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vsoxseg6ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vsoxseg6ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vsoxseg6ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsoxseg7ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vsoxseg7ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vsoxseg7ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vsoxseg7ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vsoxseg7ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vsoxseg7ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vsoxseg7ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vsoxseg7ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vsoxseg7ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vsoxseg7ei64.v v8, (a0), v16
+
+vsetvli zero, zero, e8, mf8, tu, mu
+vsoxseg8ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf4, tu, mu
+vsoxseg8ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, mf2, tu, mu
+vsoxseg8ei8.v v8, (a0), v16
+vsetvli zero, zero, e8, m1, tu, mu
+vsoxseg8ei8.v v8, (a0), v16
+vsetvli zero, zero, e16, mf4, tu, mu
+vsoxseg8ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, mf2, tu, mu
+vsoxseg8ei16.v v8, (a0), v16
+vsetvli zero, zero, e16, m1, tu, mu
+vsoxseg8ei16.v v8, (a0), v16
+vsetvli zero, zero, e32, mf2, tu, mu
+vsoxseg8ei32.v v8, (a0), v16
+vsetvli zero, zero, e32, m1, tu, mu
+vsoxseg8ei32.v v8, (a0), v16
+vsetvli zero, zero, e64, m1, tu, mu
+vsoxseg8ei64.v v8, (a0), v16
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP:1
+# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
+# CHECK-NEXT: [2] - SMX60_IEUA:1
+# CHECK-NEXT: [3] - SMX60_IEUB:1
+# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+# CHECK-NEXT: [7]: Bypass Latency
+# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
+# CHECK-NEXT: [9]: LLVM Opcode Name
+
+# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E8_V vlseg2e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E8_V vlseg2e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E8_V vlseg2e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E8_V vlseg2e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E8_V vlseg2e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E8_V vlseg2e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E16_V vlseg2e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E16_V vlseg2e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E16_V vlseg2e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E16_V vlseg2e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E16_V vlseg2e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E32_V vlseg2e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E32_V vlseg2e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E32_V vlseg2e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E32_V vlseg2e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E64_V vlseg2e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E64_V vlseg2e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E64_V vlseg2e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E8_V vlseg3e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E8_V vlseg3e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E8_V vlseg3e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E8_V vlseg3e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E8_V vlseg3e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E16_V vlseg3e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E16_V vlseg3e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E16_V vlseg3e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E16_V vlseg3e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E32_V vlseg3e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E32_V vlseg3e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E32_V vlseg3e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E64_V vlseg3e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E64_V vlseg3e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E8_V vlseg4e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E8_V vlseg4e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E8_V vlseg4e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E8_V vlseg4e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E8_V vlseg4e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E16_V vlseg4e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E16_V vlseg4e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E16_V vlseg4e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E16_V vlseg4e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E32_V vlseg4e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E32_V vlseg4e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E32_V vlseg4e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E64_V vlseg4e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E64_V vlseg4e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E8_V vlseg5e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E8_V vlseg5e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E8_V vlseg5e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E8_V vlseg5e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E16_V vlseg5e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E16_V vlseg5e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E16_V vlseg5e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E32_V vlseg5e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E32_V vlseg5e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E64_V vlseg5e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E8_V vlseg6e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E8_V vlseg6e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E8_V vlseg6e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E8_V vlseg6e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E16_V vlseg6e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E16_V vlseg6e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E16_V vlseg6e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E32_V vlseg6e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E32_V vlseg6e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E64_V vlseg6e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E8_V vlseg7e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E8_V vlseg7e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E8_V vlseg7e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E8_V vlseg7e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E16_V vlseg7e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E16_V vlseg7e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E16_V vlseg7e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E32_V vlseg7e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E32_V vlseg7e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E64_V vlseg7e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E8_V vlseg8e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E8_V vlseg8e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E8_V vlseg8e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E8_V vlseg8e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E16_V vlseg8e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E16_V vlseg8e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E16_V vlseg8e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E32_V vlseg8e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E32_V vlseg8e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E64_V vlseg8e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E8_V vsseg2e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E8_V vsseg2e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E8_V vsseg2e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E8_V vsseg2e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E8_V vsseg2e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E8_V vsseg2e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E16_V vsseg2e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E16_V vsseg2e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E16_V vsseg2e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E16_V vsseg2e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E16_V vsseg2e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E32_V vsseg2e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E32_V vsseg2e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E32_V vsseg2e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E32_V vsseg2e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E64_V vsseg2e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E64_V vsseg2e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG2E64_V vsseg2e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG3E8_V vsseg3e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG3E8_V vsseg3e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG3E8_V vsseg3e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG3E8_V vsseg3e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG3E8_V vsseg3e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG3E16_V vsseg3e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG3E16_V vsseg3e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG3E16_V vsseg3e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG3E16_V vsseg3e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG3E32_V vsseg3e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG3E32_V vsseg3e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG3E32_V vsseg3e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG3E64_V vsseg3e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG3E64_V vsseg3e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG4E8_V vsseg4e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG4E8_V vsseg4e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG4E8_V vsseg4e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG4E8_V vsseg4e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG4E8_V vsseg4e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG4E16_V vsseg4e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG4E16_V vsseg4e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG4E16_V vsseg4e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG4E16_V vsseg4e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG4E32_V vsseg4e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG4E32_V vsseg4e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG4E32_V vsseg4e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG4E64_V vsseg4e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG4E64_V vsseg4e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG5E8_V vsseg5e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG5E8_V vsseg5e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG5E8_V vsseg5e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG5E8_V vsseg5e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG5E16_V vsseg5e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG5E16_V vsseg5e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG5E16_V vsseg5e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG5E32_V vsseg5e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG5E32_V vsseg5e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG5E64_V vsseg5e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG6E8_V vsseg6e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG6E8_V vsseg6e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG6E8_V vsseg6e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG6E8_V vsseg6e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG6E16_V vsseg6e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG6E16_V vsseg6e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG6E16_V vsseg6e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG6E32_V vsseg6e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG6E32_V vsseg6e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG6E64_V vsseg6e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG7E8_V vsseg7e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG7E8_V vsseg7e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG7E8_V vsseg7e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG7E8_V vsseg7e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG7E16_V vsseg7e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG7E16_V vsseg7e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG7E16_V vsseg7e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG7E32_V vsseg7e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG7E32_V vsseg7e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG7E64_V vsseg7e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG8E8_V vsseg8e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG8E8_V vsseg8e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG8E8_V vsseg8e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG8E8_V vsseg8e8.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG8E16_V vsseg8e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG8E16_V vsseg8e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG8E16_V vsseg8e16.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG8E32_V vsseg8e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG8E32_V vsseg8e32.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSEG8E64_V vsseg8e64.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E8_V vlsseg2e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E8_V vlsseg2e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E8_V vlsseg2e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E8_V vlsseg2e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E8_V vlsseg2e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E8_V vlsseg2e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E16_V vlsseg2e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E16_V vlsseg2e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E16_V vlsseg2e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E16_V vlsseg2e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E16_V vlsseg2e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E32_V vlsseg2e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E32_V vlsseg2e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E32_V vlsseg2e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E32_V vlsseg2e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E64_V vlsseg2e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E64_V vlsseg2e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG2E64_V vlsseg2e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG3E8_V vlsseg3e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG3E8_V vlsseg3e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG3E8_V vlsseg3e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG3E8_V vlsseg3e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG3E8_V vlsseg3e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG3E16_V vlsseg3e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG3E16_V vlsseg3e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG3E16_V vlsseg3e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG3E16_V vlsseg3e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG3E32_V vlsseg3e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG3E32_V vlsseg3e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG3E32_V vlsseg3e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG3E64_V vlsseg3e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG3E64_V vlsseg3e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG4E8_V vlsseg4e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG4E8_V vlsseg4e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG4E8_V vlsseg4e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG4E8_V vlsseg4e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG4E8_V vlsseg4e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG4E16_V vlsseg4e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG4E16_V vlsseg4e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG4E16_V vlsseg4e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG4E16_V vlsseg4e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG4E32_V vlsseg4e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG4E32_V vlsseg4e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG4E32_V vlsseg4e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG4E64_V vlsseg4e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG4E64_V vlsseg4e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG5E8_V vlsseg5e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG5E8_V vlsseg5e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG5E8_V vlsseg5e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG5E8_V vlsseg5e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG5E16_V vlsseg5e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG5E16_V vlsseg5e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG5E16_V vlsseg5e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG5E32_V vlsseg5e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG5E32_V vlsseg5e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG5E64_V vlsseg5e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG6E8_V vlsseg6e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG6E8_V vlsseg6e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG6E8_V vlsseg6e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG6E8_V vlsseg6e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG6E16_V vlsseg6e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG6E16_V vlsseg6e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG6E16_V vlsseg6e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG6E32_V vlsseg6e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG6E32_V vlsseg6e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG6E64_V vlsseg6e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG7E8_V vlsseg7e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG7E8_V vlsseg7e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG7E8_V vlsseg7e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG7E8_V vlsseg7e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG7E16_V vlsseg7e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG7E16_V vlsseg7e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG7E16_V vlsseg7e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG7E32_V vlsseg7e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG7E32_V vlsseg7e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG7E64_V vlsseg7e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG8E8_V vlsseg8e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG8E8_V vlsseg8e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG8E8_V vlsseg8e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG8E8_V vlsseg8e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG8E16_V vlsseg8e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG8E16_V vlsseg8e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG8E16_V vlsseg8e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG8E32_V vlsseg8e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG8E32_V vlsseg8e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSSEG8E64_V vlsseg8e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E8_V vssseg2e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E8_V vssseg2e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E8_V vssseg2e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E8_V vssseg2e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E8_V vssseg2e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E8_V vssseg2e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E16_V vssseg2e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E16_V vssseg2e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E16_V vssseg2e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E16_V vssseg2e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E16_V vssseg2e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E32_V vssseg2e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E32_V vssseg2e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E32_V vssseg2e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E32_V vssseg2e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E64_V vssseg2e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E64_V vssseg2e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG2E64_V vssseg2e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG3E8_V vssseg3e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG3E8_V vssseg3e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG3E8_V vssseg3e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG3E8_V vssseg3e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG3E8_V vssseg3e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG3E16_V vssseg3e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG3E16_V vssseg3e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG3E16_V vssseg3e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG3E16_V vssseg3e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG3E32_V vssseg3e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG3E32_V vssseg3e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG3E32_V vssseg3e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG3E64_V vssseg3e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG3E64_V vssseg3e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG4E8_V vssseg4e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG4E8_V vssseg4e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG4E8_V vssseg4e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG4E8_V vssseg4e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG4E8_V vssseg4e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG4E16_V vssseg4e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG4E16_V vssseg4e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG4E16_V vssseg4e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG4E16_V vssseg4e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG4E32_V vssseg4e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG4E32_V vssseg4e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG4E32_V vssseg4e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG4E64_V vssseg4e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG4E64_V vssseg4e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG5E8_V vssseg5e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG5E8_V vssseg5e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG5E8_V vssseg5e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG5E8_V vssseg5e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG5E16_V vssseg5e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG5E16_V vssseg5e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG5E16_V vssseg5e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG5E32_V vssseg5e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG5E32_V vssseg5e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG5E64_V vssseg5e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG6E8_V vssseg6e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG6E8_V vssseg6e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG6E8_V vssseg6e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG6E8_V vssseg6e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG6E16_V vssseg6e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG6E16_V vssseg6e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG6E16_V vssseg6e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG6E32_V vssseg6e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG6E32_V vssseg6e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG6E64_V vssseg6e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG7E8_V vssseg7e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG7E8_V vssseg7e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG7E8_V vssseg7e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG7E8_V vssseg7e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG7E16_V vssseg7e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG7E16_V vssseg7e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG7E16_V vssseg7e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG7E32_V vssseg7e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG7E32_V vssseg7e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG7E64_V vssseg7e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG8E8_V vssseg8e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG8E8_V vssseg8e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG8E8_V vssseg8e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG8E8_V vssseg8e8.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG8E16_V vssseg8e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG8E16_V vssseg8e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG8E16_V vssseg8e16.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG8E32_V vssseg8e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG8E32_V vssseg8e32.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSSSEG8E64_V vssseg8e64.v v8, (a0), a1
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E8FF_V vlseg2e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E8FF_V vlseg2e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E8FF_V vlseg2e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E8FF_V vlseg2e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E8FF_V vlseg2e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E8FF_V vlseg2e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E16FF_V vlseg2e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E16FF_V vlseg2e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E16FF_V vlseg2e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E16FF_V vlseg2e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E16FF_V vlseg2e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E32FF_V vlseg2e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E32FF_V vlseg2e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E32FF_V vlseg2e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E32FF_V vlseg2e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E64FF_V vlseg2e64ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E64FF_V vlseg2e64ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG2E64FF_V vlseg2e64ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E8FF_V vlseg3e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E8FF_V vlseg3e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E8FF_V vlseg3e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E8FF_V vlseg3e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E8FF_V vlseg3e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E16FF_V vlseg3e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E16FF_V vlseg3e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E16FF_V vlseg3e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E16FF_V vlseg3e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E32FF_V vlseg3e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E32FF_V vlseg3e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E32FF_V vlseg3e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E64FF_V vlseg3e64ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG3E64FF_V vlseg3e64ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E8FF_V vlseg4e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E8FF_V vlseg4e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E8FF_V vlseg4e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E8FF_V vlseg4e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E8FF_V vlseg4e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E16FF_V vlseg4e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E16FF_V vlseg4e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E16FF_V vlseg4e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E16FF_V vlseg4e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E32FF_V vlseg4e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E32FF_V vlseg4e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E32FF_V vlseg4e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E64FF_V vlseg4e64ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG4E64FF_V vlseg4e64ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E8FF_V vlseg5e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E8FF_V vlseg5e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E8FF_V vlseg5e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E8FF_V vlseg5e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E16FF_V vlseg5e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E16FF_V vlseg5e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E16FF_V vlseg5e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E32FF_V vlseg5e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E32FF_V vlseg5e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG5E64FF_V vlseg5e64ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E8FF_V vlseg6e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E8FF_V vlseg6e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E8FF_V vlseg6e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E8FF_V vlseg6e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E16FF_V vlseg6e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E16FF_V vlseg6e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E16FF_V vlseg6e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E32FF_V vlseg6e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E32FF_V vlseg6e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG6E64FF_V vlseg6e64ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E8FF_V vlseg7e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E8FF_V vlseg7e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E8FF_V vlseg7e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E8FF_V vlseg7e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E16FF_V vlseg7e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E16FF_V vlseg7e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E16FF_V vlseg7e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E32FF_V vlseg7e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E32FF_V vlseg7e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG7E64FF_V vlseg7e64ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E8FF_V vlseg8e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E8FF_V vlseg8e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E8FF_V vlseg8e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E8FF_V vlseg8e8ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E16FF_V vlseg8e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E16FF_V vlseg8e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E16FF_V vlseg8e16ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E32FF_V vlseg8e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E32FF_V vlseg8e32ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLSEG8E64FF_V vlseg8e64ff.v v8, (a0)
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI8_V vluxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI8_V vluxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI8_V vluxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI8_V vluxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI8_V vluxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI8_V vluxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI16_V vluxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI16_V vluxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI16_V vluxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI16_V vluxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI16_V vluxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI32_V vluxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI32_V vluxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI32_V vluxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI32_V vluxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI64_V vluxseg2ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI64_V vluxseg2ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG2EI64_V vluxseg2ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG3EI8_V vluxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG3EI8_V vluxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG3EI8_V vluxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG3EI8_V vluxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG3EI8_V vluxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG3EI16_V vluxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG3EI16_V vluxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG3EI16_V vluxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG3EI16_V vluxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG3EI32_V vluxseg3ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG3EI32_V vluxseg3ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG3EI32_V vluxseg3ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG3EI64_V vluxseg3ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG3EI64_V vluxseg3ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG4EI8_V vluxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG4EI8_V vluxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG4EI8_V vluxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG4EI8_V vluxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG4EI8_V vluxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG4EI16_V vluxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG4EI16_V vluxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG4EI16_V vluxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG4EI16_V vluxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG4EI32_V vluxseg4ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG4EI32_V vluxseg4ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG4EI32_V vluxseg4ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG4EI64_V vluxseg4ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG4EI64_V vluxseg4ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG5EI8_V vluxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG5EI8_V vluxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG5EI8_V vluxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG5EI8_V vluxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG5EI16_V vluxseg5ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG5EI16_V vluxseg5ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG5EI16_V vluxseg5ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG5EI32_V vluxseg5ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG5EI32_V vluxseg5ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG5EI64_V vluxseg5ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG6EI8_V vluxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG6EI8_V vluxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG6EI8_V vluxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG6EI8_V vluxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG6EI16_V vluxseg6ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG6EI16_V vluxseg6ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG6EI16_V vluxseg6ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG6EI32_V vluxseg6ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG6EI32_V vluxseg6ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG6EI64_V vluxseg6ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG7EI8_V vluxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG7EI8_V vluxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG7EI8_V vluxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG7EI8_V vluxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG7EI16_V vluxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG7EI16_V vluxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG7EI16_V vluxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG7EI32_V vluxseg7ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG7EI32_V vluxseg7ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG7EI64_V vluxseg7ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG8EI8_V vluxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG8EI8_V vluxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG8EI8_V vluxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG8EI8_V vluxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG8EI16_V vluxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG8EI16_V vluxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG8EI16_V vluxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG8EI32_V vluxseg8ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG8EI32_V vluxseg8ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXSEG8EI64_V vluxseg8ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI8_V vloxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI8_V vloxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI8_V vloxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI8_V vloxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI8_V vloxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI8_V vloxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI16_V vloxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI16_V vloxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI16_V vloxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI16_V vloxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI16_V vloxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI32_V vloxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI32_V vloxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI32_V vloxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI32_V vloxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI64_V vloxseg2ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI64_V vloxseg2ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG2EI64_V vloxseg2ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG3EI8_V vloxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG3EI8_V vloxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG3EI8_V vloxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG3EI8_V vloxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG3EI8_V vloxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG3EI16_V vloxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG3EI16_V vloxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG3EI16_V vloxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG3EI16_V vloxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG3EI32_V vloxseg3ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG3EI32_V vloxseg3ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG3EI32_V vloxseg3ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG3EI64_V vloxseg3ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG3EI64_V vloxseg3ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG4EI8_V vloxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG4EI8_V vloxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG4EI8_V vloxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG4EI8_V vloxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG4EI8_V vloxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG4EI16_V vloxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG4EI16_V vloxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG4EI16_V vloxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG4EI16_V vloxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG4EI32_V vloxseg4ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG4EI32_V vloxseg4ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG4EI32_V vloxseg4ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG4EI64_V vloxseg4ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG4EI64_V vloxseg4ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG5EI8_V vloxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG5EI8_V vloxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG5EI8_V vloxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG5EI8_V vloxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG5EI16_V vloxseg5ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG5EI16_V vloxseg5ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG5EI16_V vloxseg5ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG5EI32_V vloxseg5ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG5EI32_V vloxseg5ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG5EI64_V vloxseg5ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG6EI8_V vloxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG6EI8_V vloxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG6EI8_V vloxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG6EI8_V vloxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG6EI16_V vloxseg6ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG6EI16_V vloxseg6ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG6EI16_V vloxseg6ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG6EI32_V vloxseg6ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG6EI32_V vloxseg6ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG6EI64_V vloxseg6ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG7EI8_V vloxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG7EI8_V vloxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG7EI8_V vloxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG7EI8_V vloxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG7EI16_V vloxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG7EI16_V vloxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG7EI16_V vloxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG7EI32_V vloxseg7ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG7EI32_V vloxseg7ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG7EI64_V vloxseg7ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG8EI8_V vloxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG8EI8_V vloxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG8EI8_V vloxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG8EI8_V vloxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG8EI16_V vloxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG8EI16_V vloxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG8EI16_V vloxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG8EI32_V vloxseg8ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG8EI32_V vloxseg8ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXSEG8EI64_V vloxseg8ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG2EI8_V vsuxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG2EI8_V vsuxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG2EI8_V vsuxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG2EI8_V vsuxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG2EI8_V vsuxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG2EI16_V vsuxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG2EI16_V vsuxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG2EI16_V vsuxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG2EI16_V vsuxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG2EI32_V vsuxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG2EI32_V vsuxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG2EI32_V vsuxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG2EI64_V vsuxseg2ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG2EI64_V vsuxseg2ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG3EI8_V vsuxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG3EI8_V vsuxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG3EI8_V vsuxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG3EI8_V vsuxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG3EI8_V vsuxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG3EI16_V vsuxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG3EI16_V vsuxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG3EI16_V vsuxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG3EI16_V vsuxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG3EI32_V vsuxseg3ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG3EI32_V vsuxseg3ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG3EI32_V vsuxseg3ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG3EI64_V vsuxseg3ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG3EI64_V vsuxseg3ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG4EI8_V vsuxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG4EI8_V vsuxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG4EI8_V vsuxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG4EI8_V vsuxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG4EI8_V vsuxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG4EI16_V vsuxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG4EI16_V vsuxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG4EI16_V vsuxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG4EI16_V vsuxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG4EI32_V vsuxseg4ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG4EI32_V vsuxseg4ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG4EI32_V vsuxseg4ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG4EI64_V vsuxseg4ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG4EI64_V vsuxseg4ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG5EI8_V vsuxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG5EI8_V vsuxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG5EI8_V vsuxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG5EI8_V vsuxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG5EI16_V vsuxseg5ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG5EI16_V vsuxseg5ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG5EI16_V vsuxseg5ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG5EI32_V vsuxseg5ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG5EI32_V vsuxseg5ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG5EI64_V vsuxseg5ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG6EI8_V vsuxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG6EI8_V vsuxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG6EI8_V vsuxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG6EI8_V vsuxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG6EI16_V vsuxseg6ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG6EI16_V vsuxseg6ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG6EI16_V vsuxseg6ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG6EI32_V vsuxseg6ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG6EI32_V vsuxseg6ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG6EI64_V vsuxseg6ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG7EI8_V vsuxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG7EI8_V vsuxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG7EI8_V vsuxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG7EI8_V vsuxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG7EI16_V vsuxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG7EI16_V vsuxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG7EI16_V vsuxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG7EI32_V vsuxseg7ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG7EI32_V vsuxseg7ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG7EI64_V vsuxseg7ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG8EI8_V vsuxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG8EI8_V vsuxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG8EI8_V vsuxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG8EI8_V vsuxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG8EI16_V vsuxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG8EI16_V vsuxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG8EI16_V vsuxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG8EI32_V vsuxseg8ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG8EI32_V vsuxseg8ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXSEG8EI64_V vsuxseg8ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI8_V vsoxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI8_V vsoxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI8_V vsoxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI8_V vsoxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI8_V vsoxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI8_V vsoxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI16_V vsoxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI16_V vsoxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI16_V vsoxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI16_V vsoxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI16_V vsoxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI32_V vsoxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI32_V vsoxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI32_V vsoxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI32_V vsoxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI64_V vsoxseg2ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI64_V vsoxseg2ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG2EI64_V vsoxseg2ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG3EI8_V vsoxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG3EI8_V vsoxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG3EI8_V vsoxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG3EI8_V vsoxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG3EI8_V vsoxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG3EI16_V vsoxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG3EI16_V vsoxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG3EI16_V vsoxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG3EI16_V vsoxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG3EI32_V vsoxseg3ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG3EI32_V vsoxseg3ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG3EI32_V vsoxseg3ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG3EI64_V vsoxseg3ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG3EI64_V vsoxseg3ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG4EI8_V vsoxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG4EI8_V vsoxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG4EI8_V vsoxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG4EI8_V vsoxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG4EI8_V vsoxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG4EI16_V vsoxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG4EI16_V vsoxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG4EI16_V vsoxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG4EI16_V vsoxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG4EI32_V vsoxseg4ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG4EI32_V vsoxseg4ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG4EI32_V vsoxseg4ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG4EI64_V vsoxseg4ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG4EI64_V vsoxseg4ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG5EI8_V vsoxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG5EI8_V vsoxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG5EI8_V vsoxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG5EI8_V vsoxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG5EI16_V vsoxseg5ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG5EI16_V vsoxseg5ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG5EI16_V vsoxseg5ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG5EI32_V vsoxseg5ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG5EI32_V vsoxseg5ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG5EI64_V vsoxseg5ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG6EI8_V vsoxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG6EI8_V vsoxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG6EI8_V vsoxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG6EI8_V vsoxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG6EI16_V vsoxseg6ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG6EI16_V vsoxseg6ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG6EI16_V vsoxseg6ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG6EI32_V vsoxseg6ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG6EI32_V vsoxseg6ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG6EI64_V vsoxseg6ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG7EI8_V vsoxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG7EI8_V vsoxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG7EI8_V vsoxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG7EI8_V vsoxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG7EI16_V vsoxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG7EI16_V vsoxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG7EI16_V vsoxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG7EI32_V vsoxseg7ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG7EI32_V vsoxseg7ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG7EI64_V vsoxseg7ei64.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG8EI8_V vsoxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG8EI8_V vsoxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG8EI8_V vsoxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG8EI8_V vsoxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG8EI16_V vsoxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG8EI16_V vsoxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG8EI16_V vsoxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG8EI32_V vsoxseg8ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG8EI32_V vsoxseg8ei32.v v8, (a0), v16
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXSEG8EI64_V vsoxseg8ei64.v v8, (a0), v16
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP
+# CHECK-NEXT: [1] - SMX60_IEUA
+# CHECK-NEXT: [2] - SMX60_IEUB
+# CHECK-NEXT: [3.0] - SMX60_LS
+# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 770.00 - - - - - 770.00
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg2e64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg3e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg3e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg3e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg3e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg3e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg3e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg3e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg3e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg3e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg3e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg3e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg3e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg3e64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg3e64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg4e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg4e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg4e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg4e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg4e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg4e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg4e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg4e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg4e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg4e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg4e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg4e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg4e64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg4e64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg5e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg5e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg5e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg5e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg5e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg5e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg5e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg5e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg5e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg5e64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg6e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg6e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg6e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg6e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg6e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg6e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg6e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg6e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg6e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg6e64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg7e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg7e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg7e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg7e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg7e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg7e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg7e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg7e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg7e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg7e64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg8e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg8e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg8e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg8e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg8e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg8e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg8e16.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg8e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg8e32.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vlseg8e64.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsseg2e8.v v8, (a0)
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
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+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg7ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg7ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg7ei64.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg8ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg8ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsuxseg8ei64.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei64.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei64.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg2ei64.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg3ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg3ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg3ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg3ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg3ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg3ei64.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg3ei64.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg4ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg4ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg4ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg4ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg4ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg4ei64.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg4ei64.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg5ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg5ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg5ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg5ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg5ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg5ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg5ei64.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg6ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg6ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg6ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg6ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg6ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg6ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg6ei64.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg7ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg7ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg7ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg7ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg7ei64.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg8ei8.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg8ei16.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg8ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg8ei32.v v8, (a0), v16
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, tu, mu
+# CHECK-NEXT: - - - - - - - 1.00 vsoxseg8ei64.v v8, (a0), v16
diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlxe-vsxe.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlxe-vsxe.s
new file mode 100644
index 0000000000000..8a8503ea5941a
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlxe-vsxe.s
@@ -0,0 +1,586 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=riscv64 -mcpu=spacemit-x60 -iterations=1 -instruction-tables=full < %s | FileCheck %s
+
+vsetvli zero, zero, e8, mf8, ta, ma
+vluxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, mf4, ta, ma
+vluxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, mf2, ta, ma
+vluxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m1, ta, ma
+vluxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m2, ta, ma
+vluxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m4, ta, ma
+vluxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m8, ta, ma
+vluxei8.v v8, (a0), v0
+
+vsetvli zero, zero, e16, mf4, ta, ma
+vluxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, mf2, ta, ma
+vluxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m1, ta, ma
+vluxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m2, ta, ma
+vluxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m4, ta, ma
+vluxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m8, ta, ma
+vluxei16.v v8, (a0), v0
+
+vsetvli zero, zero, e32, mf2, ta, ma
+vluxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m1, ta, ma
+vluxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m2, ta, ma
+vluxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m4, ta, ma
+vluxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m8, ta, ma
+vluxei32.v v8, (a0), v0
+
+vsetvli zero, zero, e64, m1, ta, ma
+vluxei64.v v8, (a0), v0
+vsetvli zero, zero, e64, m2, ta, ma
+vluxei64.v v8, (a0), v0
+vsetvli zero, zero, e64, m4, ta, ma
+vluxei64.v v8, (a0), v0
+vsetvli zero, zero, e64, m8, ta, ma
+vluxei64.v v8, (a0), v0
+
+vsetvli zero, zero, e8, mf8, ta, ma
+vloxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, mf4, ta, ma
+vloxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, mf2, ta, ma
+vloxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m1, ta, ma
+vloxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m2, ta, ma
+vloxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m4, ta, ma
+vloxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m8, ta, ma
+vloxei8.v v8, (a0), v0
+
+vsetvli zero, zero, e16, mf4, ta, ma
+vloxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, mf2, ta, ma
+vloxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m1, ta, ma
+vloxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m2, ta, ma
+vloxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m4, ta, ma
+vloxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m8, ta, ma
+vloxei16.v v8, (a0), v0
+
+vsetvli zero, zero, e32, mf2, ta, ma
+vloxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m1, ta, ma
+vloxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m2, ta, ma
+vloxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m4, ta, ma
+vloxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m8, ta, ma
+vloxei32.v v8, (a0), v0
+
+vsetvli zero, zero, e64, m1, ta, ma
+vloxei64.v v8, (a0), v0
+vsetvli zero, zero, e64, m2, ta, ma
+vloxei64.v v8, (a0), v0
+vsetvli zero, zero, e64, m4, ta, ma
+vloxei64.v v8, (a0), v0
+vsetvli zero, zero, e64, m8, ta, ma
+vloxei64.v v8, (a0), v0
+
+vsetvli zero, zero, e8, mf8, ta, ma
+vsuxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, mf4, ta, ma
+vsuxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, mf2, ta, ma
+vsuxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m1, ta, ma
+vsuxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m2, ta, ma
+vsuxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m4, ta, ma
+vsuxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m8, ta, ma
+vsuxei8.v v8, (a0), v0
+
+vsetvli zero, zero, e16, mf4, ta, ma
+vsuxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, mf2, ta, ma
+vsuxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m1, ta, ma
+vsuxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m2, ta, ma
+vsuxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m4, ta, ma
+vsuxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m8, ta, ma
+vsuxei16.v v8, (a0), v0
+
+vsetvli zero, zero, e32, mf2, ta, ma
+vsuxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m1, ta, ma
+vsuxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m2, ta, ma
+vsuxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m4, ta, ma
+vsuxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m8, ta, ma
+vsuxei32.v v8, (a0), v0
+
+vsetvli zero, zero, e64, m1, ta, ma
+vsuxei64.v v8, (a0), v0
+vsetvli zero, zero, e64, m2, ta, ma
+vsuxei64.v v8, (a0), v0
+vsetvli zero, zero, e64, m4, ta, ma
+vsuxei64.v v8, (a0), v0
+vsetvli zero, zero, e64, m8, ta, ma
+vsuxei64.v v8, (a0), v0
+
+vsetvli zero, zero, e8, mf8, ta, ma
+vsoxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, mf4, ta, ma
+vsoxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, mf2, ta, ma
+vsoxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m1, ta, ma
+vsoxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m2, ta, ma
+vsoxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m4, ta, ma
+vsoxei8.v v8, (a0), v0
+vsetvli zero, zero, e8, m8, ta, ma
+vsoxei8.v v8, (a0), v0
+
+vsetvli zero, zero, e16, mf4, ta, ma
+vsoxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, mf2, ta, ma
+vsoxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m1, ta, ma
+vsoxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m2, ta, ma
+vsoxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m4, ta, ma
+vsoxei16.v v8, (a0), v0
+vsetvli zero, zero, e16, m8, ta, ma
+vsoxei16.v v8, (a0), v0
+
+vsetvli zero, zero, e32, mf2, ta, ma
+vsoxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m1, ta, ma
+vsoxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m2, ta, ma
+vsoxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m4, ta, ma
+vsoxei32.v v8, (a0), v0
+vsetvli zero, zero, e32, m8, ta, ma
+vsoxei32.v v8, (a0), v0
+
+vsetvli zero, zero, e64, m1, ta, ma
+vsoxei64.v v8, (a0), v0
+vsetvli zero, zero, e64, m2, ta, ma
+vsoxei64.v v8, (a0), v0
+vsetvli zero, zero, e64, m4, ta, ma
+vsoxei64.v v8, (a0), v0
+vsetvli zero, zero, e64, m8, ta, ma
+vsoxei64.v v8, (a0), v0
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP:1
+# CHECK-NEXT: [1] - SMX60_IEU:2 SMX60_IEUA, SMX60_IEUB
+# CHECK-NEXT: [2] - SMX60_IEUA:1
+# CHECK-NEXT: [3] - SMX60_IEUB:1
+# CHECK-NEXT: [4] - SMX60_LS:2
+# CHECK-NEXT: [5] - SMX60_VFP:1
+# CHECK-NEXT: [6] - SMX60_VIEU:1
+# CHECK-NEXT: [7] - SMX60_VLS:1
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+# CHECK-NEXT: [7]: Bypass Latency
+# CHECK-NEXT: [8]: Resources (<Name> | <Name>[<ReleaseAtCycle>] | <Name>[<AcquireAtCycle>,<ReleaseAtCycle])
+# CHECK-NEXT: [9]: LLVM Opcode Name
+
+# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI8_V vluxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI8_V vluxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI8_V vluxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI8_V vluxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI8_V vluxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI8_V vluxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI8_V vluxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI16_V vluxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI16_V vluxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI16_V vluxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI16_V vluxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI16_V vluxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI16_V vluxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI32_V vluxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI32_V vluxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI32_V vluxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI32_V vluxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI32_V vluxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI64_V vluxei64.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI64_V vluxei64.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI64_V vluxei64.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLUXEI64_V vluxei64.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI8_V vloxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI8_V vloxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI8_V vloxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI8_V vloxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI8_V vloxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI8_V vloxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI8_V vloxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI16_V vloxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI16_V vloxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI16_V vloxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI16_V vloxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI16_V vloxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI16_V vloxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI32_V vloxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI32_V vloxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI32_V vloxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI32_V vloxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI32_V vloxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI64_V vloxei64.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI64_V vloxei64.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI64_V vloxei64.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VLOXEI64_V vloxei64.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI8_V vsuxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI8_V vsuxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI8_V vsuxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI8_V vsuxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI8_V vsuxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI8_V vsuxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI8_V vsuxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI16_V vsuxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI16_V vsuxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI16_V vsuxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI16_V vsuxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI16_V vsuxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI16_V vsuxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI32_V vsuxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI32_V vsuxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI32_V vsuxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI32_V vsuxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI32_V vsuxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI64_V vsuxei64.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI64_V vsuxei64.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI64_V vsuxei64.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSUXEI64_V vsuxei64.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI8_V vsoxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI8_V vsoxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI8_V vsoxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI8_V vsoxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI8_V vsoxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI8_V vsoxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI8_V vsoxei8.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI16_V vsoxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI16_V vsoxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI16_V vsoxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI16_V vsoxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI16_V vsoxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI16_V vsoxei16.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI32_V vsoxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI32_V vsoxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI32_V vsoxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI32_V vsoxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI32_V vsoxei32.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI64_V vsoxei64.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI64_V vsoxei64.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI64_V vsoxei64.v v8, (a0), v0
+# CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: 1 1 1.00 * 1 SMX60_VLS VSOXEI64_V vsoxei64.v v8, (a0), v0
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - SMX60_FP
+# CHECK-NEXT: [1] - SMX60_IEUA
+# CHECK-NEXT: [2] - SMX60_IEUB
+# CHECK-NEXT: [3.0] - SMX60_LS
+# CHECK-NEXT: [3.1] - SMX60_LS
+# CHECK-NEXT: [4] - SMX60_VFP
+# CHECK-NEXT: [5] - SMX60_VIEU
+# CHECK-NEXT: [6] - SMX60_VLS
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6]
+# CHECK-NEXT: - 88.00 - - - - - 88.00
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions:
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei64.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei64.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei64.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vluxei64.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei64.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei64.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei64.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vloxei64.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei64.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei64.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei64.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsuxei64.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e8, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei8.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e16, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei16.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, mf2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e32, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei32.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m1, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei64.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m2, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei64.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m4, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei64.v v8, (a0), v0
+# CHECK-NEXT: - 1.00 - - - - - - vsetvli zero, zero, e64, m8, ta, ma
+# CHECK-NEXT: - - - - - - - 1.00 vsoxei64.v v8, (a0), v0
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