[llvm] 1cea4a0 - [AMDGPU][NPM] Fix CFG invalidation detection in insertSimulatedTrap (#169290)

[via llvm-commits]

Author: Prasoon Mishra
Date: 2025-11-28T13:45:46+05:30
New Revision: 1cea4a0841dacefa49241538a55fbf4f34462633

URL: https://github.com/llvm/llvm-project/commit/1cea4a0841dacefa49241538a55fbf4f34462633
DIFF: https://github.com/llvm/llvm-project/commit/1cea4a0841dacefa49241538a55fbf4f34462633.diff

LOG: [AMDGPU][NPM] Fix CFG invalidation detection in insertSimulatedTrap (#169290)

When SIMULATED_TRAP is at the end of a block with no successors,
insertSimulatedTrap incorrectly returns the original MBB despite adding
HaltLoopBB to the CFG.

EmitInstrWithCustomInserter detects CFG changes by comparing the
returned MBB with the original. When they match, it assumes no
modification occurred and skips MachineLoopInfo invalidation. This
causes stale loop information in subsequent passes, particularly when
using the NPM which relies on accurate invalidation signals.

Fix: Return HaltLoopBB to properly signal the CFG modification.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index fa28a969439d9..da019b6e476df 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -1963,6 +1963,10 @@ MachineBasicBlock *SIInstrInfo::insertSimulatedTrap(MachineRegisterInfo &MRI,
     BuildMI(MBB, MI, DL, get(AMDGPU::S_CBRANCH_EXECNZ)).addMBB(TrapBB);
     MF->push_back(TrapBB);
     MBB.addSuccessor(TrapBB);
+  } else {
+    // Since we're adding HaltLoopBB and modifying the CFG, we must return a
+    // 
diff erent block to signal the change.
+    ContBB = HaltLoopBB;
   }
 
   // Start with a `s_trap 2`, if we're in PRIV=1 and we need the workaround this