[llvm] [AArch64] Fix metrics of ASIMD instructions in Neoverse N3 (PR #169790)

[Cullen Rhodes via llvm-commits]

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@@ -1138,30 +1114,30 @@ def : InstRW<[N3Wr_VMAH, N3Rd_VMAH], (instregex "^SQRDMLAHv", "^SQRDMLSHv")>;
 def : InstRW<[N3Wr_VMAL, N3Rd_VMAL], (instregex "^[SU]MLALv", "^[SU]MLSLv")>;
 
 // ASIMD multiply accumulate saturating long
-def : InstRW<[N3Wr_VMASL, N3Rd_VMASL], (instregex "^SQDMLALv", "^SQDMLSLv")>;
+def : InstRW<[N3Wr_VMASL, N3Rd_VMASL], (instregex "^SQDMLAL(v|i16|i32)", "^SQDMLSL(v|i16|i32)")>;
 
 // ASIMD multiply/multiply long (8x8) polynomial, D-form
 // ASIMD multiply/multiply long (8x8) polynomial, Q-form
 def : InstRW<[N3Write_2c_1V0], (instregex "^PMULL?(v8i8|v16i8)$")>;
 
 // ASIMD multiply long
-def : InstRW<[N3Write_4c_1V0], (instregex "^[SU]MULLv", "^SQDMULLv")>;
+def : InstRW<[N3Write_4c_1V0], (instregex "^[SU]MULLv", "^SQDMULL(v|i16|i32)")>;
 
 // ASIMD shift by immed, basic
-def : InstRW<[N3Write_2c_1V1], (instregex "^SHLv", "^SHLLv", "^SHRNv",
-                                          "^SSHLLv", "^SSHRv", "^USHLLv",
-                                          "^USHRv")>;
+def : InstRW<[N3Write_2c_1V1], (instregex "^SHL(v|d)", "^SHLLv", "^SHRNv",
+                                          "^SSHLLv", "^SSHR(v|d)", "^USHLLv",
+                                          "^USHR(v|d)")>;
 
 // ASIMD shift by immed and insert, basic
-def : InstRW<[N3Write_2c_1V1], (instregex "^SLIv", "^SRIv")>;
+def : InstRW<[N3Write_2c_1V1], (instregex "^SLI(v|d)", "^SRI(v|d)")>;
 
 // ASIMD shift by immed, complex
 def : InstRW<[N3Write_4c_1V1],
-             (instregex "^RSHRNv", "^SQRSHRNv", "^SQRSHRUNv",
+             (instregex "^RSHRNv", "^SQRSHRN(v|b|h|s)", "^SQRSHRUN(v|b|h|s)",
----------------
c-rhodes wrote:

nit: you can use a character class where the OR is implicit to match a set of individual characters
```suggestion
             (instregex "^RSHRNv", "^SQRSHRN[vbhs]", "^SQRSHRUN(v|b|h|s)",
```

https://github.com/llvm/llvm-project/pull/169790