[llvm] [AMDGPU][SIInsertWaitCnts] Use RegUnits-based tracking (PR #162077)

[Jay Foad via llvm-commits]

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@@ -733,9 +728,24 @@ class WaitcntBrackets {
     unsigned MyShift;
     unsigned OtherShift;
   };
+
+  void determineWaitForScore(InstCounterType T, unsigned Score,
+                             AMDGPU::Waitcnt &Wait) const;
+
   static bool mergeScore(const MergeInfo &M, unsigned &Score,
                          unsigned OtherScore);
 
+  iterator_range<MCRegUnitIterator> regunits(MCPhysReg Reg) const {
+    assert(Reg != AMDGPU::SCC && "Shouldn't be used on SCC");
+    const TargetRegisterClass *RC = Context->TRI->getPhysRegBaseClass(Reg);
+    unsigned Size = Context->TRI->getRegSizeInBits(*RC);
+    if (!Context->TRI->isInAllocatableClass(Reg))
+      return {{}, {}};
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jayfoad wrote:

Why is this needed? Maybe it would be possible to filter out reserved registers instead?

https://github.com/llvm/llvm-project/pull/162077