[llvm] [AArch64] Fix metrics of ASIMD instructions in Neoverse N3 (PR #169790)

Asher Dobrescu via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 27 03:39:51 PST 2025


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@@ -1305,9 +1305,9 @@ def : InstRW<[N3Write_4c_2V0], (instrs URECPEv4i32, URSQRTEv4i32)>;
 
 // ASIMD reciprocal and square root estimate, D-form F32 and scalar forms
 def : InstRW<[N3Write_3c_1V0], (instrs FRECPEv1f16, FRECPEv1i32,
-                                       FRECPEv1i64, FRECPEv2f32,
+                                       FRECPEv1i64, FRECPEv2f32, FRECPEv2f64,
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Asher8118 wrote:

While this is D-form, it is not F32, but F64. I could not find a category that fits this instruction, but this felt like the closest group it could belong to.

https://github.com/llvm/llvm-project/pull/169790


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